41594B datasheet(365/372 Pages) MICROCHIP

365 / 372 page

 2011-2012 Microchip Technology Inc.

Preliminary

DS41594B-page 365

PIC12LF1840T48A

Receive..................................................... 291

Transmit.................................................... 290

Reception.......................................................... 291

Transmission .................................................... 290

Extended Instruction Set

ADDFSR ................................................................... 313

Fail-Safe Clock Monitor....................................................... 59

Fail-Safe Condition Clearing ....................................... 59

Fail-Safe Detection ..................................................... 59

Fail-Safe Operation..................................................... 59

Reset or Wake-up from Sleep..................................... 59

Firmware Instructions........................................................ 309

Fixed Voltage Reference (FVR)........................................ 121

Associated Registers ................................................ 122

Flash Program Memory ...................................................... 95

Erasing...................................................................... 100

Modifying................................................................... 104

Writing....................................................................... 100

FSR Register ................ 24, 25, 26, 27, 28, 29, 30, 31, 32, 33

FVRCON (Fixed Voltage Reference Control) Register ..... 122

I2C Mode (MSSPx)

Acknowledge Sequence Timing................................ 249

Bus Collision

During a Repeated Start Condition................... 254

During a Stop Condition.................................... 255

Effects of a Reset...................................................... 250

I2C Clock Rate w/BRG.............................................. 257

Master Mode

Operation .......................................................... 241

Reception.......................................................... 247

Start Condition Timing .............................. 243, 244

Transmission .................................................... 245

Multi-Master Communication, Bus Collision and

Arbitration ......................................................... 250

Multi-Master Mode .................................................... 250

Read/Write Bit Information (R/W Bit) ........................ 226

Slave Mode

Transmission .................................................... 231

Sleep Operation ........................................................ 250

Stop Condition Timing............................................... 249

INDF Register ............... 24, 25, 26, 27, 28, 29, 30, 31, 32, 33

Indirect Addressing ............................................................. 37

Instruction Format ............................................................. 310

Instruction Set ................................................................... 309

ADDLW ..................................................................... 313

ADDWF..................................................................... 313

ADDWFC .................................................................. 313

ANDLW ..................................................................... 313

ANDWF..................................................................... 313

BRA........................................................................... 314

CALL ......................................................................... 315

CALLW...................................................................... 315

LSLF ......................................................................... 317

LSRF......................................................................... 317

MOVF........................................................................ 317

MOVIW ..................................................................... 318

MOVLB ..................................................................... 318

MOVWI ..................................................................... 319

OPTION .................................................................... 319

RESET ...................................................................... 319

SUBWFB................................................................... 321

TRIS.......................................................................... 322

BCF .......................................................................... 314

BSF........................................................................... 314

BTFSC...................................................................... 314

BTFSS ...................................................................... 314

CALL......................................................................... 315

CLRF ........................................................................ 315

CLRW ....................................................................... 315

CLRWDT .................................................................. 315

COMF ....................................................................... 315

DECF........................................................................ 315

DECFSZ ................................................................... 316

GOTO ....................................................................... 316

INCF ......................................................................... 316

INCFSZ..................................................................... 316

IORLW...................................................................... 316

IORWF...................................................................... 316

MOVLW .................................................................... 318

MOVWF.................................................................... 318

NOP.......................................................................... 319

RETFIE..................................................................... 320

RETLW ..................................................................... 320

RETURN................................................................... 320

RLF........................................................................... 320

RRF .......................................................................... 321

SLEEP ...................................................................... 321

SUBLW..................................................................... 321

SUBWF..................................................................... 321

SWAPF..................................................................... 322

XORLW .................................................................... 322

XORWF .................................................................... 322

INTCON Register................................................................ 83

Internal Oscillator Block

INTOSC

Specifications ................................................... 335

Internal Sampling Switch (RSS) Impedance ..................... 135

Internet Address ............................................................... 371

Interrupt-On-Change......................................................... 117

Associated Registers................................................ 119

Interrupts ............................................................................ 77

ADC .......................................................................... 130

Associated registers w/ Interrupts .............................. 88

Configuration Word w/ Clock Sources........................ 63

Configuration Word w/ Reference Clock Sources ...... 67

TMR1........................................................................ 165

INTOSC Specifications ..................................................... 335

IOCAF Register ................................................................ 118

IOCAN Register ................................................................ 118

IOCAP Register ................................................................ 118

LATA Register .................................................................. 114

Load Conditions................................................................ 333

LSLF ................................................................................. 317

LSRF ................................................................................ 317

Master Synchronous Serial Port. See MSSPx

MCLR ................................................................................. 72

Internal........................................................................ 72

MDCARH Register............................................................ 184

MDCARL Register ............................................................ 185

MDCON Register.............................................................. 182

MDSRC Register .............................................................. 183

Memory Organization ......................................................... 15

Data ............................................................................ 17

Program...................................................................... 15

41594B Datasheet(PDF) 365 Page - Microchip Technology

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