41594B datasheet(368/372 Pages) MICROCHIP

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PIC12LF1840T48A

DS41594B-page 368

Preliminary

 2011-2012 Microchip Technology Inc.

Brown-out Reset Situations ........................................ 71

Bus Collision During a Repeated Start Condition

(Case 1) ............................................................ 254

Bus Collision During a Repeated Start Condition

(Case 2) ............................................................ 254

Bus Collision During a Start Condition (SCL = 0) ..... 253

Bus Collision During a Stop Condition (Case 1) ....... 255

Bus Collision During a Stop Condition (Case 2) ....... 255

Bus Collision During Start Condition (SDA only) ...... 252

Bus Collision for Transmit and Acknowledge............ 251

CLKOUT and I/O....................................................... 336

Clock Synchronization .............................................. 239

Clock Timing ............................................................. 334

Comparator Output ................................................... 149

Enhanced Capture/Compare/PWM (ECCP) ............. 341

Fail-Safe Clock Monitor (FSCM) ................................. 60

First Start Bit Timing ................................................. 243

Half-Bridge PWM Output .................................. 198, 201

I2C Bus Data ............................................................. 349

I2C Bus Start/Stop Bits.............................................. 348

I2C Master Mode (7 or 10-Bit Transmission) ............ 246

I2C Master Mode (7-Bit Reception)........................... 248

I2C Stop Condition Receive or Transmit Mode ......... 250

INT Pin Interrupt.......................................................... 81

Internal Oscillator Switch Timing................................. 55

PWM Auto-shutdown ................................................ 200

Firmware Restart .............................................. 199

PWM Output (Active-High)........................................ 197

PWM Output (Active-Low) ........................................ 197

Repeat Start Condition.............................................. 244

Reset Start-up Sequence............................................ 73

Reset, WDT, OST and Power-up Timer ................... 337

Send Break Character Sequence ............................. 285

SPI Master Mode (CKE = 1, SMP = 1) ..................... 346

SPI Mode (Master Mode).......................................... 216

SPI Slave Mode (CKE = 0) ....................................... 347

SPI Slave Mode (CKE = 1) ....................................... 347

Synchronous Reception (Master Mode, SREN) ....... 289

Synchronous Transmission....................................... 287

Synchronous Transmission (Through TXEN) ........... 287

Timer0 and Timer1 External Clock ........................... 340

Timer1 Incrementing Edge........................................ 165

Two Speed Start-up .................................................... 58

USART Synchronous Receive (Master/Slave) ......... 345

USART Synchronous Transmission (Master/Slave) . 344

Wake-up from Interrupt ............................................... 90

Timing Diagrams and Specifications

PLL Clock.................................................................. 335

Timing Parameter Symbology........................................... 333

Timing Requirements

I2C Bus Data ............................................................. 350

SPI Mode .................................................................. 348

TMR0 Register .................................................................... 24

TMR1H Register ................................................................. 24

TMR1L Register .................................................................. 24

TMR2 Register .................................................................... 24

TRIS .................................................................................. 322

TRISA Register ........................................................... 25, 113

Two-Speed Clock Start-up Mode ........................................ 57

TXREG.............................................................................. 267

TXREG Register ................................................................. 27

TXSTA Register .......................................................... 27, 274

BRGH Bit .................................................................. 277

USART

Synchronous Master Mode

Requirements, Synchronous Receive .............. 345

Requirements, Synchronous Transmission...... 345

Timing Diagram, Synchronous Receive ........... 345

Timing Diagram, Synchronous Transmission... 344

VREF. SEE ADC Reference Voltage

Wake-up on Break ............................................................ 283

Wake-up Using Interrupts ................................................... 90

Watchdog Timer (WDT)...................................................... 72

Modes......................................................................... 92

Specifications ........................................................... 339

WCOL ....................................................... 242, 245, 247, 249

WCOL Status Flag.................................... 242, 245, 247, 249

WDTCON Register ............................................................. 93

WPUB Register................................................................. 115

Write Protection .................................................................. 45

WWW Address ................................................................. 371

WWW, On-Line Support ....................................................... 8

41594B Datasheet(PDF) 368 Page - Microchip Technology

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