05/2012

AWC6325

3.4 V Linear Power Amplifier Module

PRELIMINARY DATA SHEET - Rev 1.3

FEATURES

• InGaP HBT Technology

• High Efficiency:

• Low Quiescent Current: 4 mA

• Internal Voltage Regulation

• Built-in Directional Coupler

• Suitable for SMPS and average power tracking

systems with variable supply voltages

• APT can reduce TS.09 average power

consumption more than 25%

• Reduced External Component Count

• Thin Package: 0.9 mm

APPLICATIONS

• Dual-band Wireless Handsets and Data Devices

for CDMA/EVDO networks:

• Cellular BC 0 and 10

• PCS BC 1 and 14

PRODUCT DESCRIPTION

AWC6325 addresses the demand for increased

integration in dual-band handsets for CDMAnetworks.

The small footprint 3 mm x 5 mm x 0.9 mm surface

mount RoHS compliant package contains independent

RF PA paths to ensure optimal performance in both

frequency bands in less board area than two single

band PAs. The package pinout was chosen to enable

handset manufacturers to independently provide

bias to both power amplifiers and simplify control

with common mode pins. The AWC6325 is part of

ANADIGICS’ 3rd generation of High-Efficiency-at-

Low-Power (HELP3E™) family of power amplifiers,

which deliver low quiescent currents and significantly

greater efficiency through selectable bias modes for

high, medium and low power operation. TheAWC6325

is designed for use both with and without average

power tracking (APT). APT can be used to optimize

the Vcc level for the desired output power level

and linearity, which greatly reduces the total current

drawn from the battery. This feature, in conjunction

with selectable operating modes, enables significant

improvements in overall power added efficiency of

the AWC6325 across the entire dynamic range of

operating powers. APT requires use of an external

variable voltage supply (DC-DC converter), which is

used to provide the variable voltage to Vcc pad of the

amplifier. A low-leakage shutdown mode increases

standby time. This PA has built-in directional couplers

for each band, with a common coupler output port

CPL_OUT. The 3 mm x 5 mm x 0.9 mm surface mount

package incorporates matching networks optimized

for output power, efficiency and linearity in a 50 Ω

system. The device is manufactured on an advanced

InGaP HBT MMIC technology offering state-of-the-art

reliability, temperature stability, and ruggedness.

Figure 1: Block Diagram

1

13

11

14

12

3

4

2

GND

5

6

10

9

Bias Control

Voltage Regulation

GND at Slug (pad)

8

7

GND

Bias Control

Voltage Regulation

CPL

CPL