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AD6140ARS Datasheet(PDF) 4 Page - Analog Devices |
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AD6140ARS Datasheet(HTML) 4 Page - Analog Devices |
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4 / 8 page  REV. 0 AD6140 –4– PIN FUNCTION DESCRIPTION Pin Pin No Name Function Applicable Signal Levels 1 LNA_FORCE Output For Biasing Discrete LNA Output Ranges from 0 V (LNA OFF) to 2.7 V 2 LNA_SENSE Input For Biasing Discrete LNA VDD to VDD – 0.3 V Input 3 CLK_IN+ Positive 6.144 MHz ADC Clock Input 800 mV p-p Differential Input VDD to VDD – 0.8 V Levels Direct Coupled into 1500 Ω Impedance 4 CLK_IN– Negative 6.144 MHz ADC Clock Input 800 mV p-p Differential Input VDD to VDD – 0.8 V Levels Direct Coupled into 1500 Ω Impedance 5 BUFFER_GND ECL-to-CMOS Level Translator Ground Pin Connected to Ground 6Σ∆_DATA_OUT Σ∆ ADC Serial Data Output CMOS Logic Levels 7Σ∆_CLOCK_OUT 6.144 MHz ADC Clock Output CMOS Logic Levels 8 BUFFER_VDD ECL-to-CMOS Level Translator VDD Digital Supply Input 9 POWER_DOWN Turns IC Off and On CMOS Logic Levels; 0 V = ON, VPOS = OFF 10 AGC_TC_SELECT AGC Time Constant Select; Changes CMOS Logic Levels; 0 V = Fast Mode, AGC Capacitor Charging Current by 56:1, VPOS = Slow Mode where FAST AGC Current is 56 × SLOW AGC Current 11 DVDD Digital Power Supply Input Pin Connected to Digital Supply 12 DGND Digital Ground Pin Connected to Ground 13 AGC_CAPACITOR Charge/Discharge Current into AGC AGC Integration Capacitor Integrator Capacitor Connected to Ground 14 LO_IN+ Positive LO Input 200 mV p-p Differential Input; Internally AC-Coupled into 1500 Ω Impedance 15 LO_IN– Negative LO Input 200 mV p-p Differential Input, Internally AC-Coupled into 1500 Ω Impedance 16 BIAS_RESISTOR Resistor to Ground Sets Overall Bias 39 k Ω Resistor Connected to Ground Current and Power Consumption 17 VOLTAGE_REFERENCE_IN ADC Voltage Reference Input Regulated and Filtered 1.0 V ± 5% Input 18 AGND Analog Ground Pin Connected to Ground 19 IF_INPUT IF Input Typically 16.4 µV p-p to 65.2 mV p-p 20 AVDD Analog Power Supply Input Pin Connected to Analog Supply |
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