AD7233–Typical Performance Graphs

REV. A

–6–

APPLYING THE AD7233

Bipolar ( 5 V) Configuration

The AD7233 provides an output voltage range from –5 V to

+5 V without any external components. This configuration is

shown in Figure 4. The data format is two's complement. The

output code table is shown in Table I. If offset binary coding is

required, then this can be done by inverting the MSB in soft-

ware before the data is loaded to the AD7233.

AD7233

V

DD

GND

12-BIT

DAC

2R

2R

+15V

–15V

+5V

+12V TO

–12V TO

Figure 4. Circuit Configuration

Power Supply Decoupling

To achieve optimum performance when using the AD7233, the

0.1

µF capacitors. In very noisy environments it is recom-

mended that 10

µF capacitors be connected in parallel with the

0.1

µF capacitors.

Table I. AD7233 Bipolar Code Table

Input Data Word

MSB

LSB

XXXX 0111 1111 1111

+5 V • (2047/2048)

XXXX 0000 0000 0001

+5 V • (1/2048)

XXXX 0000 0000 0000

0 V

XXXX 1111 1111 1111

–5 V • (1/2048)

XXXX 1000 0000 0001

–5 V • (2047/2048)

XXXX 1000 0000 0000

–5 V • (2048/2048) = –5 V

X = Don’t Care

Note: 1 LSB = 5 V/2048

≈ 2.4 mV

100

0

100k

20

10

1k

10

40

30

50

60

70

80

90

100

10k

FREQUENCY – Hz

OUTPUT WITH ALL

0s ON DAC

DECOUPLING

DECOUPLING

NO DECOUPLING

OUTPUT WITH ALL

1s ON DAC

NO DECOUPLING

V

= +15V WITH

100mV p–p SIGNAL

DD

POWER SUPPLY DECOUPLING CAPACITORS

ARE 10

µF AND 0.1µF.

*

Power Supply Rejection Ratio

vs. Frequency

0.50

0

16

0.10

13

10.5

0.20

0.30

0.40

11

12

14

15

T = +25 C

A

V

/V

– Volts

DD

SS

Linearity vs. Power Supply Voltage

500

0

100k

20

5k

50

50

100

200

100 200 500 1k 2k

10k 20k

50k

FREQUENCY – Hz

OUTPUT WITH ALL

0s ON DAC

V

= +15V

V

= – 15V

T = +25 C

DD

SS

A

Noise Spectral Density

vs. Frequency