AD7237A/AD7247A

REV. 0

–12–

Either high byte or low byte data can be written first to the in-

put latch. A write to the AD7237A DAC Latch address transfers

the data from the input latches to the respective DAC latches

and updates both analog outputs. Alternatively, the LDAC in-

put can be asynchronous or can be common to a number of

AD7237As for simultaneous updating of a number of voltage

channels.

AD7237A—68008 Interface

An interface between the AD7237A and the 68008 is shown in

Figure 14. In the diagram shown, the LDAC is derived from an

asynchronous LDAC signal, but this can be derived from the

address decoder as in the previous interface diagram.

Figure 14. AD7237A to 68008 Interface

AD7237A—6502/6809 Interface

Figure 15 shows an interface between the AD7237A and the

6502 or 6809 microprocessor. The procedure for writing data to

the AD7237A is as outlined for the 8085A/8088 interface. For

the 6502 microprocessor, the

2 clock is used to generate the

WR

, while for the 6809 the E signal is used.

Figure 15. AD7237A to 6502/6809 Interface

OUTLINE DIMENSIONS

Dimensions shown in inchcs and (mm).

Plastic DIP (N-24)

Cerdip (Q-24)

SOIC (R-24)