AD7524

REV. B

–3–

ABSOLUTE MAXIMUM RATINGS*

±25 V

±25 V

Power Dissipation (Any Package)

To +75

°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW

Derates above 75

°C by . . . . . . . . . . . . . . . . . . . . 6 mW/°C

Operating Temperature

Commercial (J, K, L) . . . . . . . . . . . . . . . . . –40

°C to +85°C

Industrial (A, B, C) . . . . . . . . . . . . . . . . . . –40

°C to +85°C

Extended (S, T, U) . . . . . . . . . . . . . . . . . –55

°C to +125°C

Storage Temperature . . . . . . . . . . . . . . . . . . –65

°C to +150°C

Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300

°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the

operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

WARNING!

ESD SENSITIVE DEVICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD7524 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

TERMINOLOGY

RELATIVE ACCURACY: A measure of the deviation from a

straight line through the end points of the DAC transfer function.

Normally expressed as a percentage of full scale range. For the

RESOLUTION: Value of the LSB. For example, a unipolar con-

verter with n bits has a resolution of (2

verter of n bits has a resolution of [2

way implies linearity.

GAIN ERROR: Gain Error is a measure of the output error be-

tween an ideal DAC and the actual device output. It is measured

with all 1s in the DAC after offset error has been adjusted out

and is expressed in LSBs. Gain Error is adjustable to zero with

an external potentiometer.

FEEDTHROUGH ERROR: Error caused by capacitive cou-

OUTPUT CAPACITANCE: Capacity from OUT1 and

OUT2 terminals to ground.

OUTPUT LEAKAGE CURRENT: Current which appears

on OUT1 terminal with all digital inputs LOW or on OUT2

terminal when all inputs are HIGH. This is an error current

which contributes an offset voltage at the amplifier output.

PIN CONFIGURATIONS

DIP, SOIC

PLCC

LCCC