REV. C

AD8001

–11–

Printed Circuit Board Layout Considerations

As to be expected for a wideband amplifier, PC board parasitics

can affect the overall closed-loop performance. Of concern are

stray capacitances at the output and the inverting input nodes. If

a ground plane is to be used on the same side of the board as

the signal traces, a space (5 mm min) should be left around the

signal lines to minimize coupling. Additionally, signal lines

connecting the feedback and gain resistors should be short

enough so that their associated inductance does not cause high

frequency gain errors. Line lengths on the order of less than

5 mm are recommended. If long runs of coaxial cable are being

driven, dispersion and loss must be considered.

Power Supply Bypassing

Adequate power supply bypassing can be critical when optimiz-

ing the performance of a high frequency circuit. Inductance in

the power supply leads can form resonant circuits that produce

peaking in the amplifier’s response. In addition, if large current

transients must be delivered to the load, then bypass capacitors

(typically greater than 1

µF) will be required to provide the best

settling time and lowest distortion. A parallel combination of

4.7

µF and 0.1 µF is recommended. Some brands of electrolytic

capacitors will require a small series damping resistor

≈4.7 Ω for

optimum results.

DC Errors and Noise

There are three major noise and offset terms to consider in a

current feedback amplifier. For offset errors refer to the equa-

tion below. For noise error the terms are root-sum-squared to

give a net output error. In the circuit below (Figure 43) they are

× R

sequently multiplied by the noise gain always appears at the

× R

low 2 nV/

√Hz. At low gains though the inverting input current

device matching contribute to better offset and drift specifica-

tions for the AD8001 compared to many other current feedback

amplifiers. The typical performance curves in conjunction with

the equations below can be used to predict the performance of

the AD8001 in any application.

VV

R

R

IR

R

R

IR

OUT

IO

F

I

BN

N

F

I

BI

F

=×

+











 ±×

×

+











 ±×

11

Figure 43. Output Offset Voltage

Driving Capacitive Loads

The AD8001 was designed primarily to drive nonreactive loads.

If driving loads with a capacitive component is desired, best

frequency response is obtained by the addition of a small series

resistance as shown in Figure 44. The accompanying graph

worth noting that the frequency response of the circuit when

driving large capacitive loads will be dominated by the passive

909

500

Figure 44. Driving Capacitive Loads

40

0

0

25

30

10

5

20

15

20

10

G = +1