REV. A

AD8074/AD8075

–12–

Each of the six outputs has a 75

Ω series resistor that is used to

reverse-terminate the output transmission line. The correspond-

ing outputs are then wired in parallel and delivered to the output

cable. The termination resistors in this position help to isolate

the off capacitance of the disabled device’s outputs from loading

the enabled device’s outputs. The gain-of-two of the AD8075

compensates for the signal halving that occurs as a result of the

output terminations.

A select signal is provided directly to the

OE of the second

AD8075 and an inverted version is used to drive the other device’s

OE. This will ensure that only one device is active at a time. Since

there is a total of 150

Ω in series between any two outputs, it is

not essential to be overly concerned about the exact timing of

the making and breaking of the enable signals.

Additional inputs can easily be added to the circuit shown to

make wider multiplexers. The outputs of all of the devices will

be wired in parallel, and the logic must allow that only one output

be enabled at a time.

If it is desired to make a triple 3:1 multiplexer, a triple 2:1 mul-

tiplexer, like the AD8185 can be used along with the AD8075.

The same general guidelines for input and output treatment

should be followed and the logic must perform the proper function.

If it is desired to design such a multiplexer at unity gain, the

AD8074 should be used. For a triple 3:1 multiplexer, an

AD8183 (triple 2:1 mux) can be combined with an AD8074 to

provide this function.

Layout and Grounding

The AD8074 and AD8075 are extreme bandwidth, high-slew-rate

devices that are designed to drive up to the highest resolution

monitors and provide excellent resolution. To realize their full

performance potential, it is essential to adhere to the best prac-

tices of high-speed PCB layout.

A major area of focus should be the power distribution system.

There should be a full ground plane that provides the reference

and return paths for both the inputs and outputs. The ground

also provides isolation between the input signals to minimize the

crosstalk. This ground plane should cover as wide an area as

possible and be minimally interrupted in order to keep its

impedance to a minimum.

The power planes should also be as broad as possible to provide

minimal inductance, which is required for high-slew-rate sig-

nals. These power planes layers should be spaced closely to the

ground plane to increase the interplane capacitance between the

supplies and ground.

Each supply pin should be bypassed with a low inductance

0.1

µF ceramic capacitance with minimal excess circuit length

to minimize the series impedance. A 25

µF tantalum electro-

lytic capacitor will supply a charge reservoir for lower frequency,

high-amplitude transitions.

The input and output signals should be run as directly as pos-

sible in order to minimize the effects of parasitics. If they must

run over a longer distance of more than a few centimeters, con-

trolled impedance PCB traces should be used to minimize the

effect of reflections due to mismatches in impedance and the

proper termination should be provided.

To avoid excess crosstalk, the above recommendations should

be followed carefully. The power system and signal routing are

the most important aspects of preventing excess crosstalk.

Beyond these techniques, shielding can be provided by ground

traces between adjacent signals, especially those that travel

parallel over long distances.