AD824AR datasheet(15/16 Pages) AD

15 / 16 page

AD824

REV. A

–15–

FSY1

VP 1

FSY2

VN 1

DC1

DC2

* MODELS USED

.MODEL JX NJF(BETA=3.2526E-3 VTO=-2.000 IS=2E-12) .MODEL

NPN NPN(BF=120 VAF=150 VAR=15 RB=2E3

+ RE=4 RC=550 IS=1E-16)

.MODEL PNP PNP(BF=120 VAF=150 VAR=15 RB=2E3 + RE=4

RC=750 IS=1E-16)

.MODEL DX D(IS=1E-15)

.MODEL DY D()

.MODEL DQ D(IS=1E-16)

.ENDS AD824

AD824 SPICE Macro-model

9/94, Rev. A *

ARG/ADI

* Refer to “README.DOC” file for License Statement.

Use of this model indicates your acceptance with

the terms and provisions in the License Statement. *

* Node assignments

noninverting input

| inverting input

| | positive supply

| | | negative supply

| | | | output

| | | | |

.SUBCKT AD824

1 2 99 50 25

* INPUT STAGE & POLE AT 3.1 MHz

1.193E3

CIN

4E-12

19.229E-12

108E-6

IOS

1E-12

EOS

POLY(1) (12,98) 100E-6 1

425

476

* GAIN STAGE & DOMINANT POLE

EREF

(30,0) 1

2.205E6

54E-12

(6,5) 0.838E-3

-1

89DX

* COMMON-MODE GAIN NETWORK WITH ZERO AT 1 kHz *

R21

1E6

R22

100

C14

159E-12

E13

POLY(2) (2,98) (1,98) 0 0.5 0.5

* POLE AT 10 MHz

R23

1E6

C15

15.9E-15

G15

(9,98) 1E-6

* OUTPUT STAGE

(18,98) 1

500

IB1

2.404E-3

IB2

2.404E-3

D10

D11

C16

2E-12

C17

2E-12

DQ1

22 NPN

22 PNP

DQ2

97 PNP 20

51 NPN 20

(99,0) 1

(50,0) 1

R25

5E6

R26

5E6

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