AD8522 datasheet(4/8 Pages) AD

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AD8522

–4–

REV. A

ABSOLUTE MAXIMUM RATINGS*

VDD to DGND & AGND . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V

Logic Inputs and Output to DGND . . . . . –0.3 V, VDD + 0.3 V

VOUT to AGND . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V

VREF to AGND . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V

AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD

IOUT Short Circuit to GND or VDD . . . . . . . . . . . . . . . . 50 mA

Package Power Dissipation . . . . . . . . . . . . . . . (TJ max–TA)/

Thermal Resistance,

14-Pin Plastic DIP Package (N-14) . . . . . . . . . . . . . 83

°C/W

14-Lead SOIC Package (SO-14) . . . . . . . . . . . . . . 120

°C/W

Maximum Junction Temperature (TJ max) . . . . . . . . . . 150

°C

Operating Temperature Range . . . . . . . . . . . . . –40

°C to +85°C

Storage Temperature Range . . . . . . . . . . . . . –65

°C to +150°C

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300

°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the

operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

ORDERING GUIDE

Temperature

Package

Model

Range

Description

Option

AD8522AN

–40

°C to +85°C

14-Pin P-DIP

N-14

AD8522AR

–40

°C to +85°C

14-Lead SOIC SO-14

The AD8522 contains 1482 transistors.

PIN CONFIGURATION

14-Pin Plastic DIP

14-Lead SO-14

VOUTA

AGND

VOUTB

VREF

CLK

SDI

SDO

LDA

LDB

DGND

VDD

MSB

AD8522

(Not To Scale)

Table II. Truth Tables

DAC Register Preset

MSB

Asynchronously Resets DAC Registers to Zero

Scale

Asynchronously Presets DAC Registers to

Half Scale (800H)

None

Shift Register

CLK

Shift Register

No Effect

↑

Shifts Register One Bit, SDO Outputs Data

from 16 Clocks Earlier

WARNING!

ESD SENSITIVE DEVICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD8522 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

PIN DESCRIPTION

Function

SDI

Serial Data Input, input data loads directly into the shift register.

CLK

Clock input, positive edge clocks data into shift register.

Chip Select, active low input. Prevents shift register loading when high. Does not affect LDA and LDB operation.

LDA

Load DAC register strobes, active low. Transfers shift register data to DAC register. See truth table for operation.

Software decode feature only requires one LD strobe. Tie LDA and LDB together or use one of them with the

other pin tied high.

SDO

Serial Data Output. Output of shift register, always active.

Resets DAC registers to condition determined by MSB pin. Active low input.

MSB

Digital input: High presets DAC registers to half scale (800H); Low clears all registers to zero (000H), when RS is

strobed to active low.

VDD

Positive +5 V power supply input. Tolerance

±10%.

AGND

Analog Ground Input.

DGND

Digital Ground Input.

VREF

Reference Voltage Output, 2.5 V nominal.

VOUT A/B

DAC A/B voltage outputs, 4.095 V full scale,

±5 mA output.

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