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AD8842

PIN DESCRIPTION

Mnemonic

Description

1VOUTC

DAC C Output

2VOUTB

DAC B Output

3VOUTA

DAC A Output

4VINB

DAC B Reference Input

5VINA

DAC A Reference Input

GND

Ground

Preset Input, active low, all DAC

registers = 80H

8VINE

DAC E Reference Input

9VINF

DAC F Reference Input

VOUTE

DAC E Output

VOUTF

DAC F Output

VOUTG

DAC G Output

VOUTH

DAC H Output

VING

DAC G Reference Input

VINH

DAC H Reference Input

Load DAC Register Strobe, active-

high input that transfers the data

bits from the serial-input register

into the decoded DAC register.

SDI and CLK inputs are disabled

when LD is high. See Tables I and II

CLK

Serial Clock Input, positive edge

triggered

SDO

Serial Data Output, active totem

pole output

VSS

Negative 5 V Power Supply

SDI

Serial Data Input

VDD

Positive 5 V Power Supply

VIND

DAC D Reference Input

VINC

DAC C Reference Input

VOUTD

DAC D Output

PIN CONFIGURATION

VOUTC

VOUTB

VOUTD

VINC

VINB

GND

SDI

VSS

SDO

VOUTA

VINA

VIND

VDD

VINE

CLK

VINF

VOUTE

VINH

VOUTF

VING

VOUTG

VINH

817

916

TOP VIEW

(Not to Scale)

AD8842

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