AD9300

–4–

REV. A

SUGGESTED LAYOUT OF AD9300

PC BOARD

AD9300 BURN-IN DIAGRAM

AD9300 Timing Diagram

METALIZATION PHOTOGRAPH

MECHANICAL INFORMATION

Die Dimensions . . . . . . . . . . . . . . . . . 84

× 104 × 18 (max) mils

Pad Dimensions . . . . . . . . . . . . . . . . . . . . . . . . 4

× 4 (min) mils

Metalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Aluminum

Backing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . None

Passivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oxynitride

Die Attach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gold Eutectic

Bond Wire . . . . . . . . 1.25 mil, Aluminum; Ultrasonic Bonding

or 1 mil, Gold; Gold Ball Bonding

LOGIC TRUTH TABLE

ENABLE

OUTPUT

0

X

X

High Z

10

0

10

1

11

0

11

1

FUNCTIONAL DESCRIPTION

Four analog input channels.

GROUND

Analog input shielding grounds, not internally con-

nected. Connect each to external low-impedance

ground as close to device as possible.

One of two TTL decode control lines required for

channel selection. See Logic Truth Table.

One of two TTL decode control lines required for

channel selection. See Logic Truth Table.

ENABLE

TTL-compatible chip enable. In enabled mode

(logic HIGH), output signal tracks selected input

channel; in disabled mode (logic LOW), output is

high impedance and no signal appears at output.

Negative supply voltage; normally –10 V dc to

–15 V dc.

Positive supply voltage; normally +10 V dc to

+15 V dc.

OUTPUT

Analog output. Tracks selected input channel when

enabled.

BYPASS

Bypass terminal for internal bias line; must be

decoupled externally to ground through 0.1

µF

capacitor.

GROUND

Analog signal and power supply ground return.

RETURN