ADF4112BCP datasheet(20/24 Pages) AD

20 / 24 page

REV. 0

ADF4110/ADF4111/ADF4112/ADF4113

–20–

USING A D/A CONVERTER TO DRIVE RSET PIN

You can use a D/A converter to drive the RSET pin of the

ADF4110 family and thus increase the level of control over the

charge pump current ICP. This can be advantageous in wideband

applications where the sensitivity of the VCO varies over the

tuning range. To compensate for this, the ICP may be varied to

maintain good phase margin and ensure loop stability. See

Figure 30.

SHUTDOWN CIRCUIT

The attached circuit in Figure 31 shows how to shut down both

the ADF4110 family and the accompanying VCO. The ADG701

switch goes closed circuit when a Logic 1 is applied to the IN

input. The low-cost switch is available in both SOT-23 and

micro SO packages.

WIDEBAND PLL

Many of the wireless applications for synthesizers and VCOs in

PLLs are narrowband in nature. These applications include

the various wireless standards like GSM, DSC1800, CDMA or

WCDMA. In each of these cases, the total tuning range for the

local oscillator is less than 100 MHz. However, there are also

wide band applications where the local oscillator could have up

to an octave tuning range. For example, cable TV tuners have a

total range of about 400 MHz. Figure 32 shows an applica-

tion where the ADF4113 is used to control and program the

Micronetics M3500-2235. The loop filter was designed for an

RF output of 2900 MHz, a loop bandwidth of 40 kHz, a PFD

frequency of 1 MHz, ICP of 10 mA (2.5 mA synthesizer ICP

multiplied by the gain factor of 4), VCO KD of 90 MHz/V (sen-

sitivity of the M3500-2235 at an output of 2900 MHz) and a

phase margin of 45

°C.

In narrow-band applications, there is generally a small variation

in output frequency (generally less than 10%) and also a small

variation in VCO sensitivity over the range (typically 10% to 15%).

However, in wide band applications both of these parameters

have a much greater variation. In Figure 32, for example, we have

–25% and +17% variation in the RF output from the nominal

2.9 GHz. The sensitivity of the VCO can vary from 120 MHz/V

at 2750 MHz to 75 MHz/V at 3400 MHz (+33%, –17%).

Variations in these parameters will change the loop bandwidth.

This in turn can affect stability and lock time. By changing the

programmable ICP, it is possible to get compensation for these

varying loop conditions and ensure that the loop is always operat-

ing close to optimal conditions.

ADF4111

ADF4112

ADF4113

2.7k

VCO

GND

100pF

RFOUT

FREFIN

REFIN

100pF

RFINA

RFINB

POWER SUPPLY CONNECTIONS AND DECOUPLING

CAPACITORS ARE OMITTED FOR CLARITY.

RSET

LOOP

FILTER

CLK

DATA

SPI COMPATIBLE SERIAL BUS

AD5320

12-BIT

V-OUT DAC

MUXOUT

LOCK

DETECT

INPUT

OUTPUT

RSET

Figure 30. Driving the RSET Pin with a D/A Converter

ADF4112BCP Datasheet(PDF) 20 Page - Analog Devices

ADF4112BCP Datasheet(HTML) 20 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL