FUNCTIONAL BLOCK DIAGRAM

R

A

B

DI

DE

RE

RO

ADM485

D

2

3

4

5

6

7

8

1

GND

REV. A

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use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

a

+5 V Low Power

EIA RS-485 Transceiver

ADM485

FEATURES

Meets EIA RS-485 Standard

5 Mb/s Data Rate

Single +5 V Supply

–7 V to +12 V Bus Common-Mode Range

High Speed, Low Power BiCMOS

Thermal Shutdown Protection

Short Circuit Protection

Zero Skew Driver

Driver Propagation Delay: 10 ns

Receiver Propagation Delay: 25 ns

High Z Outputs with Power Off

Superior Upgrade for LTC485

APPLICATIONS

Low Power RS-485 Systems

DTE-DCE Interface

Packet Switching

Local Area Networks

Data Concentration

Data Multiplexers

Integrated Services Digital Network (ISDN)

PRODUCT DESCRIPTION

The ADM485 is a differential line transceiver suitable for high

speed bidirectional data communication on multipoint bus

transmission lines. It is designed for balanced data transmission

and complies with both EIA Standards RS-485 and RS-422.

The part contains a differential line driver and a differential line

receiver. Both the driver and the receiver may be enabled inde-

pendently. When disabled, the outputs are tristated.

The ADM485 operates from a single +5 V power supply.

Excessive power dissipation caused by bus contention or by out-

put shorting is prevented by a thermal shutdown circuit. This

feature forces the driver output into a high impedance state if

during fault conditions a significant temperature increase is

detected in the internal driver circuitry.

Up to 32 transceivers may be connected simultaneously on a

bus, but only one driver should be enabled at any time. It is im-

portant, therefore, that the remaining disabled drivers do not

load the bus. To ensure this, the ADM485 driver features high

output impedance when disabled and also when powered down.

This minimizes the loading effect when the transceiver is not

being utilized. The high impedance driver output is maintained

over the entire common-mode voltage range from –7 V to +12 V.

The receiver contains a fail safe feature which results in a logic

high output state if the inputs are unconnected (floating).

The ADM485 is fabricated on BiCMOS, an advanced mixed

technology process combining low power CMOS with fast

switching bipolar technology. All inputs and outputs contain

protection against ESD; all driver outputs feature high source

and sink current capability. An epitaxial layer is used to guard

against latch-up.

The ADM485 features extremely fast switching speeds. Minimal

driver propagation delays permit transmission at data rates up to

5 Mbits/s while low skew minimizes EMI interference.

The part is fully specified over the commercial and industrial

temperature range and is available in an 8-lead DIL/SOIC package.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

World Wide Web Site: http://www.analog.com

Fax: 781/326-8703

© Analog Devices, Inc., 2000