ADM705–ADM708

REV. B

–7–

If, in the event of inactivity on the WDI line, a system reset is

required, then the

WDO output should be connected to the MR

input as shown in Figure 16.

ADM705/

ADM706

RESET

GND

I/O LINE

P

MR

WDI

WDO

RESET

Figure 16.

RESET from WDO

Monitoring Additional Supply Levels

It is possible to use the power-fail comparator to monitor a

second supply as shown in Figure 17. The two sensing resistors,

R1 and R2, are selected so that the voltage on PFI drops below

1.25 V at the minimum acceptable input supply. The

PFO

output may be connected to the

MR input so that a RESET is

generated when the supply drops out of tolerance. In this case, if

either supply drops out of tolerance, a

RESET will be generated.

ADM705/

ADM706

RESET

GND

P

MR

PFI

PFO

RESET

R1

R2

5V

Ps With Bidirectional

RESET

In order to prevent contention for microprocessors with a bidi-

rectional reset line, a current limiting resistor should be inserted

between the ADM70x

RESET output pin and the

µP reset pin.

This will limit the current to a safe level if there are conflicting

output reset levels. A suitable resistor value is 4.7 k

Ω. If the

reset output is required for other uses, it should be buffered as

shown in Figure 18.

ADM70x

RESET

GND

P

RESET

GND

BUFFERED

RESET

5V

Figure 18. Bidirectional I-O

RESET

APPLICATIONS

A Typical Operating Circuit is shown in Figure 15. The unregu-

lated dc input supply is monitored using the PFI input via the

resistive divider network. Resistors R1 and R2 should be selected

so that when the supply voltage drops below the desired level

(e.g., 8 V), the voltage on PFI drops below the 1.25 V threshold

thereby generating an interrupt to the

µP. Monitoring the pre-

regulator input gives additional time to execute an orderly

shutdown procedure before power is lost.

ADM705/

ADM706

RESET

GND

P

MR

PFI

WDI

PFO

RESET

5V

WDO

UNREGULATED

DC

I/O LINE

INTERRUPT

NMI

MANUAL

RESET

GND

IN

OUT

ADM666

R1

R2

Figure 15. Typical Application Circuit

Microprocessor activity is monitored using the WDI input. This

is driven using an output line from the processor. The software

routines should toggle this line at least once every 1.6 seconds.

If a problem occurs and this line is not toggled,

WDO goes low

and a nonmaskable interrupt is generated. This interrupt rou-

tine may be used to clear the problem.

4V

5V

2 s/DIV

0V

5V

RESET

Figure 14. ADM705/ADM707

RESET Response Time