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ADMC201AP Datasheet(PDF) 14 Page - Analog Devices

Part # ADMC201AP
Description  Motion Coprocessor
PDF  15 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADMC201AP Datasheet(HTML) 14 Page - Analog Devices

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ADMC201
REV. B
–14–
Table VIII. System Status Register (SYSSTAT)
1
RESET
Bit
Function
Default
0
A/D Conversion
Completion Interrupt
(1 = True)
0
1
Vector Transformation
Completion Interrupt
(1 = True)
0
2
Digital I/O Change of State
Interrupt (1 = True)
0
4
Rotation Results are Valid
(1 = Valid)
X
2
11
IRQ Generated from This
0
Device (1 = True)
NOTES
1Reading this register clears the interrupt status flags Bits 0, 1, 2 and 11.
2Undefined until the first Vector Transformation has started
Bit 0
A/D Conversion Completion Interrupt. This register
is set to 1 when the A/D conversion process has com-
pleted and ADC interrupts have been enabled in the
SYSCTRL register.
Bit 1
Interrupt Status. This register is set to 1 when the
Vector Transformation is completed and the Vector
Transformation completion interrupts have been
enabled.
Bit 4
This bit is set to 1 when the rotation results are valid
reading this.
Bit 11 If any interrupt source on the ADMC201 occurs, then
this bit is set to 1.
Table IX. Programmable Digital I/O Control Register
(PIOCTRL)
RESET
Bit
Function
Default
0
Programmable Digital I/O Direction
Bit 0 (0 = Input, 1 = Output)
0
1
Programmable Digital I/O Direction
Bit 1 (0 = Input, 1 = Output)
0
2
Programmable Digital I/O Direction
Bit 2 (0 = Input, 1 = Output)
0
3
Programmable Digital I/O Direction
Bit 3 (0 = Input, 1 = Output)
0
4
Programmable Digital I/O Direction
Bit 4 (0 = Input, 1 = Output)
0
5
Programmable Digital I/O Direction
Bit 5 (0 = Input, 1 = Output)
0
6
Programmable Digital I/O Bit 0 Interrupt
(0 = Disable, 1 = Enable)
0
7
Programmable Digital I/O Bit 1 Interrupt
(0 = Disable, 1 = Enable)
0
8
Programmable Digital I/O Bit 2 Interrupt
(0 = Disable, 1 = Enable)
0
9
Programmable Digital I/O Bit 3 Interrupt
(0 = Disable, 1 = Enable)
0
10
Programmable Digital I/O Bit 4 Interrupt
(0 = Disable, 1 = Enable)
0
11
Programmable Digital I/O Bit 5 Interrupt
(0 = Disable, 1 = Enable)
0
Bits 0–5
Sets corresponding Digital I/O bits as either input
or output.
Bits 6–11 Configures Digital I/O Bits 0–5 as interrupt on
change of state sources. Enabling interrupts for bits
configured as output has no effect.



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