ADMC328YN datasheet(11/32 Pages) AD

11 / 32 page

ADMC328

–11–

REV. B

controls the chopping frequency. In addition, high frequency

chopping can be independently enabled for the high side and the

low side outputs using separate control bits in the PWMGATE

The PWM generator is capable of operating in two distinct

modes: single update mode or double update mode. In single

update mode, the duty cycle values are programmable only once

per PWM period, so that the resultant PWM patterns are sym-

metrical about the midpoint of the PWM period. In the double

update mode, a second updating of the PWM duty cycle values

is implemented at the midpoint of the PWM period. In this mode,

it is possible to produce asymmetrical PWM patterns that pro-

duce lower harmonic distortion in three-phase PWM inverters.

This technique also permits the closed-loop controller to change

the average voltage applied to the machine winding at a faster

rate, allowing wider closed-loop bandwidths to be achieved. The

operating mode of the PWM block (single or double update mode)

is selected by a control bit in MODECTRL register.

The PWM generator of the ADMC328 also provides an internal

signal that synchronizes the PWM switching frequency to the

A/D operation. In single update mode, a PWMSYNC pulse is

produced at the start of each PWM period. In double update

mode, an additional PWMSYNC pulse is produced at the mid-

point of each PWM period. The width of the PWMSYNC pulse

is programmable through the PWMSYNCWT register.

The PWM signals produced by the ADMC328 can be shut off

in a number of different ways. First, there is a dedicated asyn-

chronous PWM shutdown pin, PWMTRIP, which, when brought

LO, instantaneously places all six PWM outputs in the OFF

state. In addition, PWM shutdown is initiated when the voltage

on the analog input pin (ISENSE) is pulled below the trip volt-

age level, corresponding to an overcurrent fault. Because these

two hardware shutdown mechanisms are asynchronous, and

the associated PWM disable circuitry does not use clocked logic,

the PWM will shut down even if the DSP clock is not running.

The PWM system may also be shut down from software by writ-

ing to the PWMSWT register.

Status information about the PWM system of the ADMC328 is

available to the user in the SYSSTAT register. In particular, the

state of PWMTRIP is available, as well as a status bit that indi-

cates whether operation is in the first half or the second half of

the PWM period.

A functional block diagram of the PWM controller is shown in

Figure 6. The generation of the six output PWM signals on pins

AH to CL is controlled by four important blocks:

• The three-phase PWM timing unit, which is the core of the

PWM controller, generates three pairs of complemented and

dead-time-adjusted center-based PWM signals.

• The output control unit allows the redirection of the outputs

of the three-phase timing unit for each channel to either the

high side or the low side output. In addition, the output con-

trol unit allows individual enabling/disabling of each of the six

PWM output signals.

• The GATE drive unit provides the high chopping frequency

and its subsequent mixing with the PWM signals.

• The PWM shutdown controller manages the three PWM

shutdown modes (via the PWMTRIP pin, the analog block or

the PWMSWT register) and generates the correct RESET signal

for the Timing Unit.

• The PWM controller is driven by a clock at the same frequency

as the DSP instruction rate, CLKOUT, and is capable of

generating two interrupts to the DSP core. One interrupt is

generated on the occurrence of a PWMSYNC pulse, and the

other is generated on the occurrence of any PWM shutdown

action.

PWMTRIP

PWMSWT (0)

OVER

CURRENT

TRIP

PWM SHUTDOWN CONTROLLER

ANALOG BLOCK

PWMTRIP

ISENSE

PWMSEG (8...0)

OUTPUT

CONTROL

UNIT

GATE

DRIVE

UNIT

CLK

PWM DUTY CYCLE

REGISTERS

PWM CONFIGURATION

REGISTERS

TO INTERRUPT

CONTROLLER

THREE-PHASE

PWM TIMING

UNIT

CLK

RESET

SYNC

PWMSYNC

CLKOUT

PWMGATE (9...0)

PWMTM (15...0)

PWMDT (9...0)

PWMPD (15...0)

PWMSYNCWT (7...0)

MODECTRL (6)

PWMCHA (15...0)

PWMCHB (15...0)

PWMCHC (15...0)

Figure 6. Overview of the PWM Controller of the ADMC328

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