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AOZ2003 Datasheet(PDF) 2 Page - Alpha & Omega Semiconductors

Part # AOZ2003
Description  3A Ultra Low Dropout Linear Regulator
PDF  12 Pages
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Manufacturer  AOSMD [Alpha & Omega Semiconductors]
Direct Link  http://www.aosmd.com
Logo AOSMD - Alpha & Omega Semiconductors

AOZ2003 Datasheet(HTML) 2 Page - Alpha & Omega Semiconductors

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AOZ2003
Rev. 1.1 August 2012
www.aosmd.com
Page 2 of 12
Ordering Information
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
Pin Description
Part Number
Ambient Temperature Range
Package
Environmental
AOZ2003PI
-40 °C to +85 °C
EPAD SO-8
Green Product
Pin Number
Pin Name
Pin Function
1
POK
Power OK Indication. This pin is an open-drain output and is set high impedance once
VOUT reaches 90% of its rating voltage.
2
EN
Enable Input. Pulling this pin below 0.8V turns the regulator off, reducing the quiescent
current to a fraction of its operating value.
3
VIN
Input Voltage. This is the drain input to the power device that supply current to the output
pin. Large bulk capacitors with low ESR should be placed physically close to this pin o
prevent the input rail from dropping during large load transient. A 10
μF ceramic capacitor is
recommended at this pin.
4
VCNTL
Supply Input for Control Circuit. This pin provides bias voltage to the control circuitry and
driver for the pass transistor. The driving capability of output current is proportioned to the
VCNTL. For the device to regulate, the voltage on this pin must be at least 3V greater than
the output voltage, and no less than VCNTL_min.
5
NC
Not Internally Connected.
6
VOUT
Output Voltage. This pin is power output of the device. A pull low resistance exists when the
device is disabled by pulling low the EN pin.
7
FB
Feedback Voltage. This pin is the inverting input to the error amplifier. A resistor divider
from the output to GND is used to set the regulation voltage as VOUT=0.8x(R1+R2)/R2 (V)
8
GND
Ground.
Exposed PAD
GND
Ground. The exposed pad acts the dominant power dissipation path and should be
soldered to well design PCB pads.
POK
1
GND
8
EN
2
FB
7
VIN
3
VOUT
6
VCNTL
4
NC
5
Exposed
PAD
GND
EPAD SO-8
(Top View)



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