ADMCF327

–25–

REV. 0

FLASH MEMORY CONTROL REGISTER

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0x2080

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

BOOT–FROM–FLASH–CODE

0

FLASH MEMORY ADDRESS REGISTER

0

0

0

0

0

0

0

00

0

0

00

0

0

0

0x2081

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

RESERVED

ALWAYS READ 0

ADDRESS 11–0

FLASH MEMORY DATA REGISTER LOW (FMDRL)

0

0

0

0

0

0

0

00

0

0

00

0

0

0

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

RESERVED

ALWAYS READ 0

0x2083

STATUS 5–0

DATA 7–0

FLASH MEMORY DATA REGISTER HIGH (FMDRH)

0

0

0

0

0

0

0

00

0

0

00

0

0

0

15

14

13

12

11

10

9

8

76

5

4

3210

0x2082

DATA 23–8

MOST SIGNIFICANT BIT IS ON THE LEFT. FOR EXAMPLE, DATA23 IS BIT 15 OF

FMDRH.

Figure 19. Configuration of Flash Memory Registers

Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—these

bits should always be written as shown.