ADP3310

–3–

REV. A

Table I. Alternate PMOS Devices

PMOS

NDP6020P

IRF7404

Si9434DY

Manufacturer

Fairchild

IR

Temic

0.075

Ω @ V

0.06

Ω @ V

0.06

Ω @ V

–6.4 A

75 W

1.6 W

2.5 W

Derating Factor

0.5 W/

°C

0.011 W/

°C

1.6 W @ 70

°C

Package

TO-220

SO-8

SO-8

ORDERING GUIDE

Model

Output Voltage

Package Option*

ADP3310AR-2.8

2.8 V

SO-8

ADP3310AR-3

3 V

SO-8

ADP3310AR-3.3

3.3 V

SO-8

ADP3310AR-5

5 V

SO-8

*SO = Small Outline. Contact the factory for the availability of other output

voltage options from 5 V to 16.5 V.

Refer to the ADP3319 data sheet for 1.8 V and 2.5 V output voltage options.

Refer to the ADP3328 data sheet for adjustable output version.

PIN FUNCTION DESCRIPTIONS

Pin

SO-8

Name

Function

1

IS

Current Sense. Connected to the more

negative terminal of the sense resistor as

well as the Power MOSFET’s source pin.

limit feature is not used.

2, 6

NC

No Connect.

3

GATE

Gate Drive for the external MOSFET.

Input Voltage. This is also the positive

terminal connection of the current sense

resistor.

Output Voltage Sense. This pin is

connected to the MOSFET’s drain and

directly to the load for optimal load regula-

tion. Bypass to ground with a 10

µF or

larger capacitor.

7

GND

Device Ground. This pin should be tied to

system ground closest to the load.

8

EN

Enable. Pulling this pin to a logic High or

tying the pin to the input voltage will enable

the output. Pulling this pin low will disable

the regulator output.

PIN CONFIGURATION

SO-8

1

2

3

4

8

7

6

5

TOP VIEW

(Not to Scale)

NC = NO CONNECT

ADP3310

IS

NC

GND

EN

NC

GATE