REV. 0

ADP3336

–7–

Output Voltage

The ADP3336 has an adjustable output voltage that can be set

by an external resistor divider. The output voltage will be

divided by R1 and R2, and then fed back to the FB pin.

In order to have the lowest possible sensitivity of the output

voltage to temperature variations, it is important that the paral-

lel resistance of R1 and R2 is always 50 k

Ω.

RR

RR

k

12

12

50

×

+

=Ω

Also, for the best accuracy over temperature the feedback volt-

age should be set for 1.178 V:

VV

R

RR

FB

OUT

=×

+









2

12

FB pin due to loading by the internal PTAT current.

Combining the above equations and solving for R1 and R2 gives

the following formulas:

Rk

V

V

R

k

V

V

OUT

FB

FB

OUT

150

2

50

1

=Ω ×

=

Ω









–

Table I. Feedback Resistor Selection

R1 (1% Resistor)

R2 (1% Resistor)

1.5 V

63.4 k

Ω

232 k

Ω

1.8 V

76.8 k

Ω

147 k

Ω

2.2 V

93.1 k

Ω

107 k

Ω

2.7 V

115 k

Ω

88.7 k

Ω

3.3 V

140 k

Ω

78.7 k

Ω

5 V

210 k

Ω

64.9 k

Ω

10 V

422 k

Ω

56.2 k

Ω

Paddle-Under-Lead Package

The ADP3336 uses a proprietary paddle-under-lead package

design to ensure the best thermal performance in an MSOP-8

footprint. This new package uses an electrically isolated die

attach that allows all pins to contribute to heat conduction.

This technique reduces the thermal resistance to 110

°C/W on a

4-layer board as compared to >160

°C/W for a standard MSOP-8

leadframe. Figure 4 shows the standard physical construction

of the MSOP-8 and the paddle-under-lead leadframe.

DIE

Figure 4. Thermally Enhanced Paddle-Under-Lead Package

Thermal Overload Protection

The ADP3336 is protected against damage from excessive power

dissipation by its thermal overload protection circuit which limits

the die temperature to a maximum of 165

°C. Under extreme

conditions (i.e., high ambient temperature and power dissipation)

where die temperature starts to rise above 165

°C, the output

current is reduced until the die temperature has dropped to a

safe level. The output current is restored when the die tempera-

ture is reduced.

Current and thermal limit protections are intended to protect

the device against accidental overload conditions. For normal

operation, device power dissipation should be externally limited

so that junction temperatures will not exceed 150

°C.

Calculating Junction Temperature

Device power dissipation is calculated as follows:

The proprietary package used in the ADP3336 has a thermal

resistance of 110

°C/W, significantly lower than a standard

MSOP-8 package. Assuming a 4-layer board, the junction tem-

perature rise above ambient temperature will be approximately

equal to:

∆TW

C

C

A

J

=×

° =

°

0 700

110

77 0

..

To limit the maximum junction temperature to 150

°C, maxi-

mum allowable ambient temperature will be:

°C – 77.0°C = 73.0°C

Printed Circuit Board Layout Consideration

All surface mount packages rely on the traces of the PC board to

conduct heat away from the package.