ADSP2184 datasheet(16/31 Pages) AD

16 / 31 page

ADSP-2184

–16–

REV. 0

TIMING PARAMETERS

Parameter

Min

Max

Unit

Interrupts and Flag

Timing Requirements:

tIFS

IRQx, FI, or PFx Setup before CLKOUT Low1, 2, 3, 4

0.25 tCK + 15

tIFH

IRQx, FI, or PFx Hold after CLKOUT High1, 2, 3, 4

0.25 tCK

Switching Characteristics:

tFOH

Flag Output Hold after CLKOUT Low5

0.25 tCK – 7

tFOD

Flag Output Delay from CLKOUT Low5

0.5 tCK + 6

NOTES

1If

IRQx and FI inputs meet t

IFS and tIFH setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on the

following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the ADSP-2100 Family User’s Manual, Third Edition, for further information

on interrupt servicing.)

2Edge-sensitive interrupts require pulsewidths greater than 10 ns; level-sensitive interrupts must be held low until serviced.

IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQE.

4PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.

5Flag outputs = PFx, FL0, FL1, FL2, Flag_out.

tFOD

tFOH

tIFH

tIFS

CLKOUT

FLAG

OUTPUTS

IRQx

PFx

Figure 10. Interrupts and Flags

ADSP2184 Datasheet(PDF) 16 Page - Analog Devices

ADSP2184 Datasheet(HTML) 16 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Datasheet Download

Link URL