Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

ADV7152LS110 Datasheet(PDF) 23 Page - Analog Devices

Part # ADV7152LS110
Description  CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7152LS110 Datasheet(HTML) 23 Page - Analog Devices

Back Button ADV7152LS110 Datasheet HTML 19Page - Analog Devices ADV7152LS110 Datasheet HTML 20Page - Analog Devices ADV7152LS110 Datasheet HTML 21Page - Analog Devices ADV7152LS110 Datasheet HTML 22Page - Analog Devices ADV7152LS110 Datasheet HTML 23Page - Analog Devices ADV7152LS110 Datasheet HTML 24Page - Analog Devices ADV7152LS110 Datasheet HTML 25Page - Analog Devices ADV7152LS110 Datasheet HTML 26Page - Analog Devices ADV7152LS110 Datasheet HTML 27Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 23 / 32 page
background image
ADV7152
–23–
REV. B
Variations on RS-343A
Various other video output configurations can be implemented
by the ADV7152, including RS-170. Values of RSET for particu-
lar output video formats/levels are calculated by using the equa-
tions for RSET given in the “Pin Configuration” section. The
table shows calculated values of RSET for some of the most com-
mon variants on the RS-343A standard. The associated wave-
forms are shown in the diagrams.
RSET ( )
Video Signal
265
SYNC
decoded on IOG; Pedestal = 0 IRE
280
No SYNC decoded; Pedestal = 7.5 IRE
259
No SYNC decoded; Pedestal = 0 IRE
WHITE
LEVEL
IOR, IOB
IOG
mA
mA
V
V
26.67 1.000
0.698
18.62
00
00
8.05
0.302
BLACK/BLANK
LEVEL
SYNC
LEVEL
100 IRE
43 IRE
Figure 29. Composite Video Waveform (SYNC
Decoded on IOG; Pedestal = 0 IRE; RSET = 265 Ω)
WHITE LEVEL
BLACK LEVEL
IOR, IOB, IOG
mA
V
19.05
0.714
00
1.44
0.054
BLANK LEVEL
92.5 IRE
7.5 IRE
Figure 30. Composite Video Waveform
(Pedestal = 7.5 IRE; RSET = 280 Ω)
WHITE LEVEL
IOR, IOB, IOG
mA
V
19.05
0.714
00
BLACK/ BLANK
LEVEL
100 IRE
Figure 31. Composite Video Waveform
(Pedestal = 0 IRE; RSET = 259 Ω)
IPLL Synchronization Output Control
This output synchronization signal is used in applications where
it is necessary to synchronize multiple palette devices (ADV7150
+ ADV7151) to subpixel resolution. Each devices IPLL output
signal is in phase with its analog RGB output signal. If multiple
devices have differing output delays, the time difference can be
derived from the IPLL signals. This time difference is then used
to phase shift the CLOCK inputs on one or other of the devices
inputs.
The IPLL signal is internally triggered by either the falling edge
of SYNC or BLANK as determined by CR21 of Command
Register 2.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com