RT7276 datasheet(13/24 Pages) RICHTEK

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RT7275/76

DS7275/76-00 January 2013

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Latch-Off Mode (TSSOP-14 (Exposed Pad) Only)

The RT7275GCP/RT7276GCP, use latch-off mode OVP

and UVP. When the protection function is triggered the

IC will shut down. The IC stops switching, leaving both

switches open, and is latched off. To restart operation,

toggle EN or power the IC off and then on again.

Shut-down, Start-up and Enable (EN)

The enable input (EN) has a logic-low level of 0.4V. When

VEN is below this level the IC enters shutdown mode and

supply current drops to less than 10

μA. When VEN exceeds

its logic-high level of 2V the IC is fully operational.

Between these 2 levels there are 2 thresholds (1.2V typical

and 1.4V typical). When VEN exceeds the lower threshold

the internal bias regulators begin to function and supply

current increases above the shutdown current level.

Switching operation begins when VEN exceeds the upper

threshold. Unlike many competing devices, EN is a high

voltage input that can be safely connected to VIN (up to

18V) for automatic start-up.

Input Under-voltage Lock-out

In addition to the enable function, the RT7275/76 feature

an under-voltage lock-out (UVLO) function that monitors

the internal linear regulator output (PVCC). To prevent

operation without fully-enhanced internal MOSFET

switches, this function inhibits switching when PVCC

drops below the UVLO-falling threshold. The IC resumes

switching when PVCC exceeds the UVLO-rising threshold.

Soft-Start (SS)

The RT7275/76 soft-start uses an external pin (SS) to

clamp the output voltage and allow it to slowly rise. After

VEN is high and PVCC exceeds its UVLO threshold, the

IC begins to source 2

μA from the SS pin. An external

capacitor at SS is used to adjust the soft-start timing.

The available capacitance range is from 2.7nF to 220nF.

Do not leave SS unconnected.

During start-up, while the SS capacitor charges, the

RT7275/76 operate in discontinuous switching mode with

very small pulses. This prevents negative inductor currents

and keeps the circuit from sinking current. Therefore, the

output voltage may be pre-biased to some positive level

before start-up. Once the VSS ramp charges enough to

raise the internal reference above the feedback voltage,

switching will begin and the output voltage will smoothly

rise from the pre-biased level to its regulated level. After

VSS rises above about 2.2V output over-and under-voltage

protections are enabled and the RT7275 begins

continuous-switching operation.

Internal Regulator (PVCC)

An internal linear regulator (PVCC) produces a 5.1V supply

from VIN that powers the internal gate drivers, PWM logic,

reference, analog circuitry, and other blocks. If VIN is 6V

or greater, PVCC is guaranteed to provide significant power

for external loads.

PGOOD Comparator

PGOOD is an open drain output controlled by a comparator

connected to the feedback signal. If FB exceeds 90% of

the internal reference voltage, PGOOD will be high

impedance. Otherwise, the PGOOD output is connected

to PGND.

External Bootstrap Capacitor (C6)

Connect a 0.1

μF low ESR ceramic capacitor between

BOOT and SW. This bootstrap capacitor provides the gate

driver supply voltage for the high side N-channel MOSFET

switch.

Over Temperature Protection

The RT7275/76 includes an over temperature protection

(OTP) circuitry to prevent overheating due to excessive

power dissipation. The OTP will shut down switching

operation when the junction temperature exceeds 150

°C.

Once the junction temperature cools down by

approximately 20

°C the IC will resume normal operation

with a complete soft-start. For continuous operation,

provide adequate cooling so that the junction temperature

does not exceed 150

°C.

RT7276 Datasheet(PDF) 13 Page - Richtek Technology Corporation

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