RT8048 datasheet(9/11 Pages) RICHTEK

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RT8048

DS8048-01

June 2011

www.richtek.com

Application Information

The basic RT8048 application circuit is shown in Typical

Application Circuit. External component selection is

determined by the maximum load current and begins with

the selection of the inductor value and operating frequency

followed by CIN and COUT. Although frequency as high as

3MHz are possible, the minimum on-time of the RT8048

imposes a minimum limit on the operating duty cycle.

The minimum duty is equal to 70ns’ fOSC(Hz)’ 100%.

Inductor Selection

For a given input and output voltage, the inductor value

and operating frequency determine the ripple current. The

ripple current

ΔIL increases with higher VIN and decreases

with higher inductance :

Having a lower ripple current reduces the ESR losses in

the output capacitors and the output voltage ripple. Highest

efficiency operation is achieved at low frequency with small

ripple current. This, however, requires a large inductor. A

reasonable starting point for selecting the ripple current

ΔIL = 0.4 (IMAX). The largest ripple current occurs at the

highest VIN. To guarantee that the ripple current stays

below a specified maximum, the inductor value should be

chosen according to the following equation :

OUT

OSC

L(MAX)

IN(MAX)

L =

⎡⎤ ⎡

⎤

−

⎢⎥ ⎢

⎥

×Δ

⎢⎥ ⎢

⎥

⎣⎦ ⎣

⎦

Inductor Core Selection

Once the value for L is known, the type of inductor can be

selected. High efficiency converters generally cannot afford

the core loss found in low cost powdered iron cores, forcing

the use of more expensive ferrite or molypermalloy cores.

Actual core loss is independent of core size for a fixed

inductor value, but it is very dependent on the inductance

selected. As the inductance increases, core losses

decrease. Unfortunately, increased inductance requires

more turns of wire and, therefore, more copper losses.

Ferrite designs have very low core losses and are preferred

at high switching frequencies. Hence, design goals should

concentrate on copper loss and saturation prevention.

Ferrite core material saturates “ hard” , which means that

the inductance collapses abruptly when the peak design

current is exceeded. This result in an abrupt increase in

inductor ripple current and consequent output voltage ripple.

Do not allow the core to saturate! Different core materials

and shapes will change the size, current and price/current

relationship of an inductor. Toroid or shielded pot cores in

ferrite or permalloy materials are small and don’t radiate

energy, but generally cost more than powdered iron core

inductors with similar characteristics. The choice of

inductor type to use mainly depends on the price vs. size

requirements and any radiated field/EMI requirements.

CIN and COUT Selection

The input capacitance, CIN, is needed to filter the

trapezoidal current at the source of the top MOSFET. To

prevent large ripple voltage, a low ESR input capacitor

sized for the maximum RMS current should be used. RMS

current is given by :

OUT

OSC

I =

⎡⎤ ⎡⎤

Δ−

⎢⎥ ⎢⎥

⎣⎦

=−

OUT

RMS

OUT(MAX)

OUT

This formula has a maximum at VIN = 2VOUT, where IRMS =

IOUT/2. This simple worst case condition is commonly used

for design because even significant deviations do not offer

much relief. Note that ripple current ratings from capacitor

manufacturers are often based on only 2000 hours of life,

which makes it advisable to either further derate the

capacitor or choose a capacitor rated at a higher

temperature than required. Several capacitors may also

be placed in parallel to meet size or height requirements

in the design. The selection of COUT is determined by the

effective series resistance (ESR) that is required to

minimize voltage ripple and load step transients, as well

as the amount of bulk capacitance that is necessary to

ensure that the control loop is stable. Loop stability can

be examined by viewing the load transient response as

described in a later section. The output ripple,

ΔVOUT, is

determined by :

OUT

OSC

OUT

ESR

⎡⎤

Δ≤ Δ

⎢⎥

⎣⎦

The output ripple is highest at maximum input voltage

since

ΔIL increases with input voltage. Multiple capacitors

placed in parallel may be needed to meet the ESR and

RMS current handling requirements. Dry tantalum, special

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