ADC12DL080 datasheet(10/14 Pages) TI1

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Gain1-5

CLK

GND

ADC14155

LMH6515

*Note: the ADC input coupling

capacitors and ADC input impedance

must be considered to accurately

determine the bandpass ﬁlter center

frequency and system gain.

C in

R IN

incurring a substantial noise-performance penalty

simply by choosing a suitable RF . The LMH6552

ampliﬁer noise ﬁgure is 10.3 dB for a gain of nine.

The second and third harmonic-distortion (HD2/

HD3) speciﬁcations at 20 MHz are -92/-93 dBc

respectively, equal to 14-bit converter distortion

levels; while at well over 100 MHz, both HD2

and HD3 exceed the -60 dBc HD performance of

high-speed 8-bit converters.

Alternatively, you may use the ADC14DS105

high-speed ADC and the LMK02000 clock con-

ditioner with the LMH6552. The ADC14DS105

is a 14-bit dual 105 MSPS ADC with serial LVDS

outputs, featuring full power bandwidth of

1 GHz and the industry’s highest SFDR of 81 dB at

240 MHz. The LMK02000 clock conditioner

incorporates the industry’s highest performance

PLL and divider blocks and delivers the industry’s

lowest additive jitter, as low as 20 fs. Combined with

the LMH6552, these devices are suitable for up to

40 MHz Nyquist frequency baseband applications

or oversampled baseband applications on signal

bandwidths of 26.5 MHz and lower. A second or

higher order low pass ﬁlter is recommended before

the ADC in order to minimize the eﬀect of noise

and distortion on system performance. Together,

these devices are ideal for use in communications

applications such as in low IF narrowband sampling

below 70 MHz IF where a fourth or higher order

bandpass ﬁlter would be recommended.

For under-sampled IF applications, Figure 9

shows National’s new fully-diﬀerential LMH6515

Digital Variable Gain Ampliﬁer (DVGA) driv-

ing the ADC14155 converter. The ﬁlter in this

example is a second-order RLC bandpass ﬁlter

F-3dB

2π LC

which is tuned to the desired IF frequency by

appropriate selection of the output inductor, L, and

output capacitor, C, according to the equation:

The LMH6515 provides digitally-programmable

gain from -7 dB to 24 dB in 1 dB steps, with

600 MHz of bandwidth, 37 dBm OIP3 at

150 MHz, and 8.3 dB-noise ﬁgure for 100Ω

total load. The gain selectability of the LMH6515

allows better utilization of the ADC full-scale

range and results in a larger system dynamic

range. The ADC14155 has 1.1 GHz full-power

bandwidth and delivers 11 ENOB at 238 MHz.

The combination of the ADC14155 and LMH6515

is suitable for a wide range of IF-sampled commu-

nication applications.

Another option is to use the ADC14V155 high-

speed A/D converter and LMK03001 clock

conditioner with the LMH6515. The ADC14V155

is a 155 MSPS ADC with 1.1 GHz full-power

bandwidth and features the industry’s best SFDR

above 170 MHz input frequency. At 238 MHz,

the SFDR is 85 dB. The LMK03001 is the

industry’s ﬁrst complete clock-conditioner chip

and features the industry’s best jitter performance:

200 fs rms from 10 Hz to 20 MHz bandwidth in

clock-generator mode and 400 fs from 12 kHz to

20 MHz bandwidth in jitter-cleaner mode.

This article has shown that sampled-data systems

can be divided into two main types: Nyquist-

sampled and under-sampled. Depending on

the type of system a given application may use, a

DC-coupled wideband ampliﬁer or an AC-coupled,

narrow-band IF ampliﬁer may be used in order

to drive the ADC. As illustrated, National has a

variety of solutions that can meet the noise and

distortion needs of these various systems whether it

be for 8- to 10-bit GSPS or for higher-resolution,

12- to 14-bit at >100 MSPS.

■

Figure 9. LMH6515 and AD14155 IF-sampled application

SignalPathDesigner.indd 9

9/5/07 3:24:36 PM

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