LTC3621 datasheet(6/16 Pages) LINER

6 / 16 page

LTC3621/LTC3621-2

3621f

For more information www.linear.com/LTC3621

pin FuncTions (DFN/MSOP)

block DiagraM

SW (Pin 1/Pin 1): Switch Node Connection to the Inductor

of the Step-Down Regulator.

VIN(Pin2/Pin2):InputVoltageoftheStep-DownRegulator.

RUN (Pin 3/Pin 3): Logic Controlled RUN Input. Do not

leave this pin floating. Logic high activates the step-down

regulator.

FB (Pin 4/Pin 5): Feedback Input to the Error Amplifier

of the Step-Down Regulator. Connect a resistor divider

tap to this pin. The output voltage can be adjusted from

0.6V to VIN by:

VOUT = 0.6V • [1 + (R1/R2)]

PGOOD (Pin 4, MSOP Package Only): VOUT within Regu-

lation Indicator.

INTVCC(Pin5/Pin6):LowDropoutRegulator.Bypasswith

at least 1µF to Ground.

MODE (Pin 6/Pin 7): Burst Mode Select of the Step-Down

Regulator. Tie MODE to INTVCC for Burst Mode operation

with a 400mA peak current clamp, tie MODE to GND for

pulse skipping operation, and tie MODE to a voltage be-

tween 1V and VINTVCC – 1V for forced continuous mode.

GND (Exposed Pad Pin 7/Pin 9): Ground Backplane for

PowerandSignalGround.MustbesolderedtoPCBground.

SGND (Pin 8, MSOP Package Only): Signal Ground.

–

ERROR

AMPLIFIER

BURST

AMPLIFIER

MAIN

I-COMPARATOR

–

OVERCURRENT

COMPARATOR

REVERSE

COMPARATOR

0.6V

MODE

RUN

PGOOD

INTVCC

CLK

VIN – 5V

GND

3621 BD

VIN

INTVCC

OSCILLATOR

LDO

MS8E PACKAGE ONLY

BUCK

LOGIC

AND

GATE DRIVE

SLOPE

COMPENSATION

0.8ms

SOFT-START

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