Aeroflex Circuit Technology

SCDCT2500 REV A 6/12/98 Plainview NY (516) 694-6700

8

CLK

STR1

STR2

DATABUS

ENV

RXDATA

RXCLOCK

RCVDTA

RCVCNTRL

ERR1

ERR2

OVERFLOW

WIIN

SYNCIN

PRTYIN

PAREN

POE

Figure 6 – Sink Data Frame Example Diagram

32 Bit

Data Bus

Internal Bus

32 Bit

Register

32 Bit

FIFO

CT2500

Protocol

Address

Decoder

Logic

Sequencer

FIFO & Reg.

Protocol

System Interrupts

Address Bits

Controls

Control

Signals

Chip

Manchester

Encoded

Data

CT1698

Transceiver

Figure 7 – Typical I/O Board Configuration (Source and Sink Mode)