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T7121 Datasheet(PDF) 4 Page - Agere Systems

Part # T7121
Description  T7121 HDLC Interface for ISDN
PDF  68 Pages
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Manufacturer  AGERE [Agere Systems]
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T7121 Datasheet(HTML) 4 Page - Agere Systems

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Lucent Technologies Inc.
Data Sheet
April 1997
T7121 HDLC Interface for ISDN (HIFI-64)
Pin Information
5-5028
Figure 2. Pin Diagram
Table 1. Pin Assignments
Group
Symbol
Function
Chip Clock
CLK
0 MHz—12 MHz
Power & Ground
VDD
VSS
5 V Power
Ground
Microprocessor Bus Interface
RD
WR
CS
INT
RESET
AD7—AD0
ALE
A3—A0
Read
Write
Chip Select
Interrupt
Reset
Address/Data Bus
Address Latch Enable
Address Bus (non-ALE addressing mode)
Serial Link Interface
DXA
DXB
TSCA
CLKX
FS
CLKR
DRA
DRB
Transmit Data A
Transmit Data B
Time-slot Control DXA
Transmit Clock
Frame Synchronization
Receive Clock
Receive Data A
Receive Data B
ALE
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
RD
CS
INT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VDD
A2
A3
CLKR/DRB
DXA
CLKX
DXB/TSCA
FS
RESET
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VSS
WR
A0
CLK
VSS
DRA
LUCENT
T7121
HIFI-64
A1



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