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T7264 Datasheet(PDF) 13 Page - Agere Systems

Part # T7264
Description  T7264 U-Interface 2B1Q Transceiver
PDF  54 Pages
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Manufacturer  AGERE [Agere Systems]
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Lucent Technologies Inc.
13
Data Sheet
April 1998
T7264 U-Interface 2B1Q Transceiver
K2 Interface Description (continued)
K2 Bits Description
Table 4 summarizes the K2 interface bits which are
common to all configurations. The K2 frame consists of
eight octets of data. The first three octets contain the
18 bits of 2B+D data. Bits 5—8 of the third octet contain
U frame and superframe timing (DF). Octet 4 (S1) is
reserved for future use and should always be set to 1.
Octets 5, 6, and 7 are directly mapped to the U-inter-
face M (UM) maintenance bits which are transparent to
the device, except the adea bit. Octet 8 is for device
status (DS) and device control (DC). These bits must
be manipulated according to the T1.601 standard to
obtain proper system-level operation.
Figure 11 describes the four different K2 interface for-
mats for DO and DI at the NT and LT. Tables 5—14 de-
scribe the position and meaning of the various bits on
the K2 interface. Tables 15 and 16 show the active logic
level for these bits, their value during reset/idle, and
their value when the transceiver is operational.
Table 4. K2 Interface Serial Data Bit Map
Bits marked with 1 should always be set to a 1. Bits marked as Rxx are reserved by T1.601 and should be set
to a 1.
* Items differ dependent upon NT or LT mode.
† Don't care.
Time ----------------------------------------------------------->
Symbol
Octet
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
B1
1
B11
B12
B13
B14
B15
B16
B17
B18
B2
2
B21
B22
B23
B24
B25
B26
B27
B28
D
3
D1
D2
1
1
1
1
1
1
DF
3
D1
D2
1
1
RSF
RF
TSF
TF
S1
4
1
1
1
1
1
1
1
1
UM1
5
a1
a2
a3
dm
i1
i2
i3
i4
UM2
6
i5
i6
i7
i8
act
R1, 5
R1, 6
*
UM3
7
R2, 5
*
*
*
*
R6, 4
*
*
DS
8
nebe
xact
†
1
oof
1
rsksi
1
DC
8
ccrc
istp
lpbk
afrst
ldea
1
sksi
xpcy



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