AL460 HD FIFO Datasheet

©2007~2010 by AverLogic Technologies, Corp.

V1.2

2/14

Amendments

Revise Date

Contents

Page

2008.07.01

Preliminary version 0.01

2009.06.04

Revised Reference design schematic: XIN = 14.31818

MHz; CSEL[1:0] = VDD33

8

2009.08.06

Revised Pin definitions: Pin 98 = ROINV; Pin 99 =ROEN.

7

2010.03.12

Update DC and AC Characteristics

10

2010.09.30

Correct Pin Description (ROEN, ROINV)

7

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