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AN-849 Datasheet(PDF) 2 Page - Analog Devices |
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AN-849 Datasheet(HTML) 2 Page - Analog Devices |
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2 / 8 page ![]() AN-849 Rev. A | Page 2 of 8 Most comparators are quite fast and some are very fast indeed—but so are some op amps. Why must we expect low speed when using an op amp as a comparator? A comparator is designed to be used with large differential input voltages, whereas op amps typically operate closed loop with their input voltages minimized by negative feedback. When an op amp is overdriven, sometimes by only a few millivolts, some of its stages may saturate. If this occurs, the device takes a comparatively long time to come out of saturation, and is, therefore, much slower than if it were unsaturated. OUTPUT OF OP AMP USED AS A COMPARATOR OUTPUT OF OP AMP USED CLOSED-LOOP (NO SATURATION/ DESATURATION) INPUT DELAY DUE TO DESATURATION t 0 Figure 2. The desaturation time of an overdriven op amp is likely to be considerably longer than its normal group delay (effectively the time a signal takes from input to output) and often depends on the amount of overdrive. Because few op amps are characterized for their recovery times from differing levels of overdrive, it is necessary for the user to determine, by experiment, the delays likely to result from the levels of overdrive expected in a particular application. The value used in design calculations should be at least twice the worst value seen in any tests, because the samples tested may not be representative. The output of a purpose-built comparator is designed to drive a particular logic family or families. Often there is a separate supply for the output stage to ensure that the logic levels are correct. A modern op amp usually has rail-to-rail output—its maximum positive level is close to the positive supply, and the minimum negative level is close to the negative supply. (Older designs used structures with headroom of more than 1.5 V to both supplies.) OP AMP LOGIC Figure 3. If logic and op amp share the same supply, a rail-to-rail op amp can drive CMOS and TTL logic families successfully, but if the op amp and logic have different supplies, additional interface circuitry is necessary between them. Note that this applies to an op amp with ±5 V supplies that must drive logic with +5 V supply; the logic is liable to be damaged if −5 V is applied to it. The simplest interface circuits are inverters. They may be built with NPN transistors, but these draw base current. N-channel MOSFET transistors are more convenient. OP AMP +VA –VA RL RB LOGIC +VL –VL LOGIC OP AMP +VA –VA RL +VL –VL Figure 4. RB sets the transistor base current, and RL sets the collector/drain current. The lower their value, the faster the inverter, but the more power it consumes. Values of a few kilohms are usually used. The N-channel MOS device should have a low gate threshold voltage (<2 V) and a gate-source breakdown voltage greater than the maximum output voltages of the op amp. Usually, ±25 V is sufficient. Even though the op amp and the logic use different supplies, they must be related to each other. The op amp positive supply, +VA, must be more positive than the logic negative supply, −VL, by at least 3 V to provide enough voltage to turn on the transistor or the MOSFET gate. In addition, the op amp negative supply must not be positive relative to the logic negative supply, although it may be connected to it. One must, of course, observe the absolute maximum ratings of all the devices used. LOGIC OP AMP +VA –VA +VL –VL P N Figure 5. A complementary MOS inverter can be built with a P-channel and an N-channel MOSFET. This has the advantage of drawing no standby current, but it does have a large current spike during switching when both devices are briefly turned on together. With this arrangement, the op amp positive supply, +VA, must be equal to or greater than the logic positive supply, +VL. In addition, the op amp negative supply must be equal to or less than the logic negative supply. |
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