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PIC16F87 Datasheet(PDF) 219 Page - Microchip Technology |
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PIC16F87 Datasheet(HTML) 219 Page - Microchip Technology |
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219 / 230 page ![]() 2002-2013 Microchip Technology Inc. DS30487D-page 219 PIC16F87/88 E EEADR Register .......................................................... 18, 29 EEADRH Register ........................................................ 18, 29 EECON1 Register ........................................................ 18, 29 EECON2 Register ........................................................ 18, 29 EEDATA Register ........................................................ 18, 29 EEDATH Register ........................................................ 18, 29 Electrical Characteristics .................................................. 163 Errata ................................................................................... 6 Exiting Sleep with an Interrupt ........................................... 52 External Clock Input ........................................................... 38 External Clock Input (RA4/T0CKI). See Timer0. External Interrupt Input (RB0/INT). See Interrupt Sources. F Fail-Safe Clock Monitor ............................................ 131, 146 Flash Program Memory ..................................................... 29 Associated Registers ................................................. 36 EEADR Register ........................................................ 29 EEADRH Register ...................................................... 29 EECON1 Register ...................................................... 29 EECON2 Register ...................................................... 29 EEDATA Register ...................................................... 29 EEDATH Register ...................................................... 29 Erasing ....................................................................... 32 Reading ...................................................................... 32 Writing ........................................................................ 34 FSR Register ......................................................... 16, 17, 28 G General Purpose Register File ........................................... 14 I I/O Ports ............................................................................. 53 PORTA ....................................................................... 53 PORTB ....................................................................... 59 TRISB Register .......................................................... 59 I2C Addressing ................................................................. 95 Associated Registers ................................................. 97 Master Mode .............................................................. 97 Mode .......................................................................... 94 Mode Selection .......................................................... 94 Multi-Master Mode ..................................................... 97 Reception ................................................................... 95 SCL and SDA Pins ..................................................... 95 Slave Mode ................................................................ 95 Transmission .............................................................. 95 ID Locations ............................................................. 131, 149 In-Circuit Debugger .......................................................... 149 In-Circuit Serial Programming .......................................... 131 In-Circuit Serial Programming (ICSP) .............................. 149 INDF Register ........................................................ 16, 17, 28 Indirect Addressing ............................................................ 28 Instruction Set .................................................................. 151 Descriptions ............................................................. 153 General Format ........................................................ 151 Read-Modify-Write Operations ................................ 151 Summary Table ........................................................ 152 ADDLW .................................................................... 153 ADDWF .................................................................... 153 ANDLW .................................................................... 153 ANDWF .................................................................... 153 BCF .......................................................................... 153 BSF .......................................................................... 153 BTFSC ..................................................................... 154 BTFSS ..................................................................... 154 CALL ........................................................................ 154 CLRF ....................................................................... 154 CLRW ...................................................................... 154 CLRWDT ................................................................. 154 COMF ...................................................................... 155 DECF ....................................................................... 155 DECFSZ .................................................................. 155 GOTO ...................................................................... 155 INCF ........................................................................ 155 INCFSZ .................................................................... 155 IORLW ..................................................................... 156 IORWF ..................................................................... 156 MOVF ...................................................................... 156 MOVLW ................................................................... 156 MOVWF ................................................................... 156 NOP ......................................................................... 156 RETFIE .................................................................... 157 RETLW .................................................................... 157 RETURN .................................................................. 157 RLF .......................................................................... 157 RRF ......................................................................... 157 SLEEP ..................................................................... 157 SUBLW .................................................................... 158 SUBWF .................................................................... 158 SWAPF .................................................................... 158 XORLW ................................................................... 158 XORWF ................................................................... 158 INT Interrupt (RB0/INT). See Interrupt Sources. INTCON Register GIE Bit ....................................................................... 21 INT0IE Bit .................................................................. 21 INT0IF Bit .................................................................. 21 PEIE Bit ..................................................................... 21 RBIE Bit ..................................................................... 21 RBIF Bit ..................................................................... 21 TMR0IE Bit ................................................................ 21 Internal Oscillator Block ..................................................... 39 INTRC Modes ............................................................ 40 Internet Address .............................................................. 226 Interrupt Sources ..................................................... 131, 140 AUSART Receive/Transmit Complete ....................... 99 RB0/INT Pin, External ............................................. 142 TMR0 Overflow ........................................................ 142 Interrupts RB7:RB4 Port Change .............................................. 59 Interrupts, Context Saving During .................................... 142 Interrupts, Enable Bits A/D Converter Interrupt Enable (ADIE Bit) ................ 22 AUSART Receive Interrupt Enable (RCIE Bit) .......... 22 AUSART Transmit Interrupt Enable (TXIE Bit) .......... 22 CCP1 Interrupt Enable (CCP1IE Bit) ......................... 22 Comparator Interrupt Enable (CMIE Bit) ................... 24 EEPROM Write Operation Interrupt Enable (EEIE Bit) . 24 Global Interrupt Enable (GIE Bit) ....................... 21, 140 Interrupt-on-Change (RB7:RB4) Enable (RBIE Bit) . 142 Oscillator Fail Interrupt Enable (OSFIE Bit) ............... 24 Peripheral Interrupt Enable (PEIE Bit) ....................... 21 Port Change Interrupt Enable (RBIE Bit) ................... 21 RB0/INT Enable (INT0IE Bit) ..................................... 21 Synchronous Serial Port (SSP) Interrupt Enable (SSPIE Bit) ..................................................................... 22 TMR0 Overflow Enable (TMR0IE Bit) ........................ 21 |
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