STM32F103C8T7 datasheet(39/105 Pages) STMICROELECTRONICS

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STM32F103x8, STM32F103xB

Electrical characteristics

Doc ID 13587 Rev 15

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5.3.2

Operating conditions at power-up / power-down

Subject to general operating conditions for TA.

Table 10.

Operating conditions at power-up / power-down

5.3.3

Embedded reset and power control block characteristics

The parameters given in Table 11 are derived from tests performed under ambient

temperature and VDD supply voltage conditions summarized in Table 9.

VIN

I/O input voltage

Standard IO

–0.3

VDD+

0.3

FT IO(3)

2 V < VDD ≤ 3.6 V

–0.3

5.5

VDD = 2 V

–0.3

5.2

BOOT0

5.5

Power dissipation at TA = 85 °C

for suffix 6 or TA = 105 °C for

suffix 7(4)

LFBGA100

454

LQFP100

434

UFBGA100

339

TFBGA64

308

LQFP64

444

LQFP48

363

UFQFPN48

624

VFQFPN36

1000

Ambient temperature for 6

suffix version

Maximum power dissipation

–40

°C

Low power dissipation(5)

–40

105

Ambient temperature for 7

suffix version

Maximum power dissipation

–40

105

Low power dissipation(5)

–40

125

Junction temperature range

6 suffix version

–40

105

7 suffix version

–40

125

When the ADC is used, refer to Table 46: ADC characteristics.

It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV

between VDD and VDDA can be tolerated during power-up and operation.

To sustain a voltage higher than VDD+0.3 V, the internal pull-up/pull-down resistors must be disabled.

If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Table 6.2: Thermal

characteristics on page 93).

In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see

Table 6.2: Thermal characteristics on page 93).

Table 9.

General operating conditions (continued)

Symbol

Parameter

Conditions

Min

Max

Unit

Symbol

Parameter

Conditions

Min

Max

Unit

tVDD

VDD rise time rate

∞

µs/V

VDD fall time rate

∞

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