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HT85F2270 Datasheet(PDF) 119 Page - Holtek Semiconductor Inc |
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HT85F2270 Datasheet(HTML) 119 Page - Holtek Semiconductor Inc |
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119 / 226 page  Rev. 1.00 119 of ��6 �a� 1�� �01� Standard 8051 8-Bit Flash MCU HT85F2260/HT85F2270/HT85F2280 Register Description This section provides a description of all the registers associated with I/O setup and control. The following table gives a summary of all associated I/O registers, which will be described in detail later. I/O Register List Register Name Bit 7 6 5 4 3 2 1 0 P0WAKE P07WU P06WU P0�WU P04WU P0�WU P0�WU P01WU P00WU P0 P0.7 P0.6 P0.� P0.4 P0.� P0.� P0.1 P0.0 P0�0 P0�0.7 P0�0.6 P0�0.� P0�0.4 P0�0.� P0�0.� P0�0.1 P0�0.0 P0�1 P0�1.7 P0�1.6 P0�1.� P0�1.4 P0�1.� P0�1.� P0�1.1 P0�1.0 P1 P1.7 P1.6 P1.� P1.4 P1.� P1.� P1.1 P1.0 P1�0 P1�0.7 P1�0.6 P1�0.� P1�0.4 P1�0.� P1�0.� P1�0.1 P1�0.0 P1�1 P1�1.7 P1�1.6 P1�1.� P1�1.4 P1�1.� P1�1.� P1�1.1 P1�1.0 P� P�.7 P�.6 P�.� P�.4 P�.� P�.� P�.1 P�.0 P��0 P��0.7 P��0.6 P��0.� P��0.4 P��0.� P��0.� P��0.1 P��0.0 P��1 P��1.7 P��1.6 P��1.� P��1.4 P��1.� P��1.� P��1.1 P��1.0 P� P�.7 P�.6 P�.� P�.4 P�.� P�.� P�.1 P�.0 P��0 P��0.7 P��0.6 P��0.� P��0.4 P��0.� P��0.� P��0.1 P��0.0 P��1 P��1.7 P��1.6 P��1.� P��1.4 P��1.� P��1.� P��1.1 P��1.0 P4 P4.7 P4.6 P4.� P4.4 P4.� P4.� P4.1 P4.0 P� P�.7 P�.6 P�.� P�.4 P�.� P�.� P�.1 P�.0 SRCR — — SRCR.� SRCR.4 SRCR.� SRCR.� SRCR.1 SRCR.0 Each Port has its own data register, known as P0, P1, P2, P3, P4 and P5 which are used to control the input and output I/O pin data. These registers read input pin data or write output pin data on the selected I/O pin. For I/O pins setup as outputs a read operation to these registers will setup either a high or low level on the corresponding pin. For I/O pins setup as inputs a read operation to these registers will read the actual logic level on the corresponding pin. P0 Register SFR Address: 80h Bit 7 6 5 4 3 2 1 0 Name P0.7 P0.6 P0.� P0.4 P0.� P0.� P0.1 P0.0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 1 1 1 1 1 1 1 1 P1 Register SFR Address: 90h Bit 7 6 5 4 3 2 1 0 Name P1.7 P1.6 P1.� P1.4 P1.� P1.� P1.1 P1.0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 1 1 1 1 1 1 1 1 |
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