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OPA656 Datasheet(PDF) 15 Page - Texas Instruments |
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OPA656 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 25 page ![]() OPA656 15 SBOS196G www.ti.com c) Careful selection and placement of external components will preserve the high frequency performance of the OPA656. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal film and carbon composition axially leaded resistors can also pro- vide good high frequency performance. Again, keep their leads and PCB trace length as short as possible. Never use wirewound type resistors in a high frequency application. Since the output pin and inverting input pin are the most sensitive to parasitic capacitance, always position the feedback and series output resistor, if any, as close as possible to the output pin. Other network components, such as noninverting input termination resistors, should also be placed close to the package. Where double side component mounting is allowed, place the feed- back resistor directly under the package on the other side of the board between the output and inverting input pins. Even with a low parasitic capacitance shunting the external resistors, exces- sively high resistor values can create significant time constants that can degrade performance. Good axial metal film or surface- mount resistors have approximately 0.2pF in shunt with the resistor. For resistor values > 1.5k Ω, this parasitic capacitance can add a pole and/or zero below 500MHz that can effect circuit operation. Keep resistor values as low as possible consistent with load driving considerations. It has been suggested here that a good starting point for design would be to keep RF || RG < 250 Ω for voltage amplifier applications. Doing this will auto- matically keep the resistor noise terms low, and minimize the effect of their parasitic capacitance. Transimpedance applica- tions (see Figure 3) can use whatever feedback resistor is required by the application as long as the feedback compensa- tion capacitor is set considering all parasitic capacitance terms on the inverting node. d) Connections to other wideband devices on the board may be made with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50mils to 100mils) should be used, preferably with ground and power planes opened up around them. Estimate the total capacitive load and set RS from the plot of Recommended RS vs Capacitive Load. Low parasitic capacitive loads (< 5pF) may not need an RS since the OPA656 is nominally compensated to operate with a 2pF parasitic load. Higher parasitic capacitive loads without an RS are allowed as the signal gain increases (increasing the unloaded phase margin) If a long trace is required, and the 6dB signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched impedance trans- mission line using microstrip or stripline techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50 Ω environment is normally not necessary onboard, and in fact a higher impedance environment will improve distortion as shown in the distortion versus load plots. With a characteristic board trace impedance defined based on board material and trace dimensions, a matching series resistor into the trace from the output of the OPA656 is used as well as a terminating shunt resistor at the input of the destination device. Remember also that the terminating impedance will be the parallel combination of the shunt resistor and the input impedance of the destination device— this total effective impedance should be set to match the trace impedance. If the 6dB attenuation of a doubly-termi- nated transmission line is unacceptable, a long trace can be series-terminated at the source end only. Treat the trace as a capacitive load in this case and set the series resistor value as shown in the plot of Recommended RS vs Capacitive Load. This will not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destina- tion device is low, there will be some signal attenuation due to the voltage divider formed by the series output into the terminating impedance. e) Socketing a high speed part like the OPA656 is not recommended. The additional lead length and pin-to-pin ca- pacitance introduced by the socket can create an extremely troublesome parasitic network which can make it almost impos- sible to achieve a smooth, stable frequency response. Best results are obtained by soldering the OPA656 onto the board. INPUT AND ESD PROTECTION The OPA656 is built using a very high speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings table. All device pins are protected with internal ESD protec- tion diodes to the power supplies as shown in Figure 5. These diodes provide moderate protection to input overdrive voltages above the supplies as well. The protection diodes can typically support 30mA continuous current. Where higher currents are possible (for example, in systems with ±12V supply parts driving into the OPA656), current limiting series resistors should be added into the two inputs. Keep these resistor values as low as possible since high values degrade both noise performance and frequency response. FIGURE 5. Internal ESD Protection. External Pin +V CC –V CC Internal Circuitry |
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