TSM103AIDT datasheet(3/9 Pages) STMICROELECTRONICS

3 / 9 page

TSM103/A

3/9

OPERATOR 2 (independent op-amp)

+ = +5V, V

CC = Ground, Vo = 1.4V,Tamb = 25°C (unless otherwise specified)

Symbol

Parameter

Min.

Typ.

Max.

Unit

Vio

Input Offset Voltage

TSM103, Tamb = 25°C

Tmin. ≤ Tamb ≤ Tmax.

TSM103A, Tamb = 25°C

Tmin. ≤ Tamb ≤ Tmax.

0.5

DVio

Input Offset Voltage Drift

µV/°C

Iio

Input Offset Current

Tmin. ≤ Tamb ≤ Tmax.

230

Iib

Input Bias Current

Tmin. ≤ Tamb ≤ Tmax

150

200

Avd

Large Signal Voltage Gain

VCC = 15V, RL = 2k, Vo = 1.4V to 11.4V

Tmin. ≤ Tamb ≤ Tmax.

100

V/mV

SVR

Supply Voltage Rejection Ratio

VCC = 5V to 30V

100

Vicm

Input Common Mode Voltage Range

VCC = +30V - see note

Tmin. ≤ Tamb ≤ Tmax.

1. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of

the common-mode voltage range is VCC

+ - 1.5V.

But either of both inputs can go to +36V without damage.

(VCC+) -1.5

(VCC

+) -2

CMR

Common Mode Rejection Ratio

Tmin. ≤ Tamb ≤ Tmax.

Isource

Output Current Source

VCC = +15V, Vo = 2V, Vid = +1V

Short Circuit to Ground

VCC = +15V

Isink

Output Current Sink

Vid = -1V,

VCC = +15V, Vo = 2V

VOH

High Level Output Voltage

VCC

+ = 30V

Tamb = 25°C, RL = 10k

Tmin. ≤ Tamb ≤ Tmax.

VOL

Low Level Output Voltage

RL = 10k

Tmin. ≤ Tamb ≤ Tmax.

520

Slew Rate at Unity Gain

Vi = 0.5 to 3V, VCC = 15V

RL = 2k, CL = 100pF, unity gain

0.2

0.4

µs

GBP

Gain Bandwidth Product

VCC = 30V,RL = 2k, CL = 100pF

f = 100kHz, Vin = 10mV

0.5

0.9

MHz

THD

Total Harmonic Distortion

f = 1kHz

AV = 20dB,RL = 2k, VCC = 30V

CL = 100pF, Vo = 2Vpp

0.02

Obsolete

Product(s)

- Obsolete

Product(s)

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