TMP175 datasheet(6/20 Pages) TI1

6 / 20 page

TMP175

TMP75

SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007

www.ti.com

TEMPERATURE

(

°C)

DIGITAL OUTPUT

(BINARY)

HEX

128

0111 1111 1111

7FF

127.9375

0111 1111 1111

7FF

100

0110 0100 0000

640

0101 0000 0000

500

0100 1011 0000

4B0

0011 0010 0000

320

0001 1001 0000

190

0.25

0000 0000 0100

004

0000 0000 0000

000

−0.25

1111 1111 1100

FFC

−25

1110 0111 0000

E70

−55

1100 1001 0000

C90

Table 5. Temperature Data Format

The user can obtain 9, 10, 11, or 12 bits of resolution by

addressing the Configuration Register and setting the

resolution bits accordingly. For 9-, 10-, or 11-bit resolution,

the most significant bits in the Temperature Register are

used with the unused LSBs set to zero.

CONFIGURATION REGISTER

The Configuration Register is an 8-bit read/write register

used to store bits that control the operational modes of the

temperature sensor. Read/write operations are performed

MSB first. The format of the Configuration Register for the

TMP175 and TMP75 is shown in Table 6, followed by a

breakdown of the register bits. The power-up/reset value

of the Configuration Register is all bits equal to 0.

BYTE

POL

Table 6. Configuration Register Format

SHUTDOWN MODE (SD)

The Shutdown Mode of the TMP175 and TMP75 allows

the user to save maximum power by shutting down all

device circuitry other than the serial interface, which

reduces current consumption to typically less than 0.1

µA.

Shutdown Mode is enabled when the SD bit is 1; the device

will shut down once the current conversion is completed.

When SD is equal to 0, the device will maintain a

continuous conversion state.

THERMOSTAT MODE (TM)

The Thermostat Mode bit of the TMP175 and TMP75

indicates to the device whether to operate in Comparator

Mode (TM = 0) or Interrupt Mode (TM = 1). For more

information on comparator and interrupt modes, see the

High and Low Limit Registers section.

POLARITY (POL)

The Polarity Bit of the TMP175 and TMP75 allows the user

to adjust the polarity of the ALERT pin output. If POL = 0,

the ALERT pin will be active LOW, as shown in Figure 3.

For POL = 1, the ALERT pin will be active HIGH, and the

state of the ALERT pin is inverted.

Measured

Temperature

HIGH

LOW

TMP75/TMP175 ALERT PIN

(Comparator Mode)

POL = 0

TMP75/TMP175 ALERT PIN

(Interrupt Mode)

POL = 0

TMP75/TMP175 ALERT PIN

(Comparator Mode)

POL = 1

TMP75/TMP175 ALERT PIN

(Interrupt Mode)

POL = 1

Read

Time

Read

Figure 3. Output Transfer Function Diagrams

FAULT QUEUE (F1/F0)

A fault condition is defined as when the measured

temperature exceeds the user-defined limits set in the

THIGH and TLOW Registers. Additionally, the number of

fault conditions required to generate an alert may be

programmed using the fault queue. The fault queue is

provided to prevent a false alert as a result of

environmental

noise.

The

fault

queue

requires

consecutive fault measurements in order to trigger the

alert function. Table 7 defines the number of measured

faults that may be programmed to trigger an alert condition

in the device. For THIGH and TLOW register format and byte

order, see the section High and Low Limit Registers.

CONSECUTIVE FAULTS

Table 7. Fault Settings of the TMP175 and TMP75

CONVERTER RESOLUTION (R1/R0)

The Converter Resolution Bits control the resolution of the

internal Analog-to-Digital (A/D) converter. This allows the

user to maximize efficiency by programming for higher

TMP175 Datasheet(PDF) 6 Page - Texas Instruments

TMP175 Datasheet(HTML) 6 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL