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EVAL-AD7793EBZ1 Datasheet(PDF) 22 Page - Analog Devices

Part # EVAL-AD7793EBZ1
Description  3-Channel, Low Noise, Low Power, 16-/24-Bit 誇-? ADC with On-Chip In-Amp and Reference
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

EVAL-AD7793EBZ1 Datasheet(HTML) 22 Page - Analog Devices

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AD7792/AD7793
Rev. B | Page 22 of 32
Single Conversion Mode
In single conversion mode, the AD7792/AD7793 are placed in
shutdown mode between conversions. When a single conver-
sion is initiated by setting MD2, MD1, MD0 to 0, 0, 1 in the
mode register, the AD7792/AD7793 power up, perform a single
conversion, and then return to shutdown mode. The on-chip
oscillator requires 1 ms to power up. A conversion requires a
time period of 2 × tADC. DOUT/RDY goes low to indicate the
completion of a conversion. When the data-word has been read
from the data register, DOUT/RDY goes high. If CS is low,
DOUT/RDY remains high until another conversion is initiated
and completed. The data register can be read several times, if
required, even when DOUT/RDY has gone high.
Continuous Conversion Mode
This is the default power-up mode. The AD7792/AD7793
continuously converts, the RDY pin in the status register going
low each time a conversion is completed. If CS is low, the
DOUT/ RDY line also goes low when a conversion is complete.
To read a conversion, the user writes to the communications
register indicating that the next operation is a read of the data
register. The digital conversion is placed on the DOUT/ RDY
pin as soon as SCLK pulses are applied to the ADC.
DOUT/RDY returns high when the conversion is read. The
user can read this register additional times, if required.
However, the user must ensure that the data register is not being
accessed at the completion of the next conversion, otherwise the
new conversion word is lost.
0x58
DIN
0x08
0x200A
DATA
SCLK
DOUT/RDY
CS
Figure 17. Single Conversion
DIN
SCLK
DOUT/RDY
CS
0x58
0x58
DATA
DATA
Figure 18. Continuous Conversion



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