| Electronic Components Datasheet Search |
|
AD8021 Datasheet(PDF) 24 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD8021 Datasheet(HTML) 24 Page - Analog Devices |
|
24 / 28 page ![]() AD7685 Rev. C | Page 24 of 28 APPLICATION HINTS LAYOUT The printed circuit board (PCB) that houses the AD7685 should be designed so that the analog and digital sections are separated and confined to certain areas of the board. The pinout of the AD7685 with all its analog signals on the left side and all its digital signals on the right side eases this task. Avoid running digital lines under the device because these couple noise onto the die, unless a ground plane under the AD7685 is used as a shield. Fast switching signals, such as CNV or clocks, should never run near analog signal paths. Crossover of digital and analog signals should be avoided At least one ground plane should be used. It could be common or split between the digital and analog section. In the latter case, the planes should be joined underneath the AD7685. The AD7685 voltage reference input REF has a dynamic input impedance and should be decoupled with minimal parasitic inductances. This is done by placing the reference decoupling ceramic capacitor close to, and ideally right up against, the REF and GND pins and connected with wide, low impedance traces. Finally, the power supplies VDD and VIO should be decoupled with ceramic capacitors, typically 100 nF, placed close to the AD7685 and connected using short and wide traces to provide low impedance paths and to reduce the effect of glitches on the power supply lines. An example layout following these rules is shown in Figure 46 and Figure 47. EVALUATING THE PERFORMANCE OF THE AD7685 Other recommended layouts for the AD7690 are outlined in the documentation of the evaluation board (EVAL-AD7685CB). The evaluation board package includes a fully assembled and tested evaluation board, documentation, and software for controlling the board from a PC via the universal evaluation control board (EVAL-CONTROL BRD3). Figure 46. Example of Layout of the AD7685 (Top Layer) Figure 47. Example of Layout of the AD7685 (Bottom Layer) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |