AN247 datasheet(19/32 Pages) MICROCHIP

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 2003 Microchip Technology Inc.

DS00247A-page 19

AN247

; *****************************************************************************

; Function:

_bootChksm _UpdateChksum(WREG _bootChksmL)

;

; PreCondition: Nothing

; Input: _bootChksmL

; Output: _bootChksm. This is a static 16 bit value stored in the Access Bank.

; Side Effects: STATUS register is corrupted.

; Stack Requirements: 1 level.

; Overview: This function adds a byte to the current 16 bit checksum

;

count. WREG should contain the byte before being called.

;

The _bootChksm value is considered a part of the special

;

;***************************************************************************

_UpdateChksum:

addwf

_bootChksmL, F ; Keep a checksum

btfsc

STATUS, C

incf

_bootChksmH, F

return

; *****************************************************************************

; Function:

VOID _CANInit(CAN, BOOT)

;

; PreCondition: Enter only after a reset has occurred.

; Input: CAN control information, bootloader control information

; Output: None.

; Side Effects: N/A. Only run immediately after reset.

; Stack Requirements: N/A

; Overview: This routine is technically not a function since it will not

;

return when called. It has been written in a linear form to

;

save space.Thus 'call' and 'return' instructions are not

;

included, but rather they are implied.

;

This routine tests the boot flags to determine if boot mode is

;

desired or normal operation is desired. If boot mode then the

;

routine initializes the CAN module defined by user input. It

;

also resets some registers associated to bootloading.

;

; *****************************************************************************

_CANInit:

clrf

EECON1

setf

EEADR

; Point to last location of EEDATA

setf

EEADRH

bsf

EECON1, RD

; Read the control code

incfsz EEDATA, W

#ifdef NEAR_JUMP

bra

RESET_VECT

; If not 0xFF then normal reset

#else

goto

RESET_VECT

#endif

clrf

_bootSpcCmd

; Reset the special command register

movlw

0x1C

; Reset the boot control bits

movwf

_bootCtlBits

movlb

d'15'

; Set Bank 15

bcf

TRISB, CANTX

; Set the TX pin to output

movlw

CAN_RXF0SIDH

; Set filter 0

movwf

RXF0SIDH

movlw

CAN_RXF0SIDL

movwf

RXF0SIDL

comf

WREG

; Prevent filter 1 from causing a

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