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BCM5482 Datasheet(PDF) 2 Page - Broadcom Corporation. |
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BCM5482 Datasheet(HTML) 2 Page - Broadcom Corporation. |
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2 / 2 page ![]() O V ERVI EW ® Phone: 949-450-8700 Fax: 949-450-8710 E-mail: info@broadcom.com Web: www.broadcom.com BROADCOM CORPORATION 16215 Alton Parkway, P.O. Box 57013 Irvine, California 92619-7013 © 2005 by BROADCOM CORPORATION. All rights reserved. 5482-PB00-R 4/29/05 Broadcom®, the pulse logo, QuadSquad™, and Connecting everything® are trademarks of Broadcom Corporation and/or its subsidiaries in the United States and certain other countries. All other trademarks mentioned are the property of their respective owners. A member of Broadcom’s third generation of Gigabit Ethernet PHYs, the BCM5482 consists of two complete 10/100/1000BASE-T Gigabit Ethernet transceivers integrated on a single monolithic CMOS chip. The BCM5482 is optimized for low power and small footprint size to reduce design complexity for space-constrained IP phone applications. For 10/ 100BASE-TX applications, the single package offers a compelling advantage over two single devices for Gigabit uplinks. The BCM5482 DSP-based architecture and advanced power management techniques combine to achieve robust and low-power operation over existing Category 5 twisted-pair wiring. The BCM5482 architecture not only meets the requirements of IEEE 802.3, IEEE 802.3u, and IEEE 802.3ab, but also maintains the industry’s highest level of margin over IEEE requirements for echo, near-end crosstalk (NEXT), and far-end crosstalk (FEXT). With the industry's lowest power at 600 mW per port, the BCM5482 assists in reducing the power distribution requirements of IP phone systems. In addition, the BCM5482 has extremely low EMI emissions, which reduces the design constraints required to meet EMI radiation specifications. The BCM5482 supports the RGMII, SGMII, and SerDes MAC interfaces. The RGMII, SGMII, and serial SerDes inteerfaces are reduced-pin-count (12, 6, and 4, respectively, versus 25) versions of the GMII. The RGMII clock timing can be adjusted to eliminate the board trace delays required by the RGMII specification. These reduced-pin- count interfaces simplify design and lower system cost by reducing the number of layers required for signal routing. In addition, these interfaces allow fewer pins at the MAC/switch, which reduces the MAC/switch cost by enabling smaller die sizes than would be possible with full GMII. This device is another member of Broadcom’s 0.13-µm Gigabit Ethernet copper PHY family, joining more than 25 other quad and single products. The 0.13-µm process is the optimal process that offers the best performance, lowest cost, and lowest power for Gigabit Ethernet copper solutions. Broadcom continues to expand its leadership in 0.13-µm technology with the BCM5482, part of its third generation of 0.13-µm Gigabit Ethernet copper transceivers. Each BCM5482 port is fully independent and has individual interface, control, and status registers, and incorporates a number of advanced features. This includes identifying physical wiring defects that the BCM5482 cannot automatically correct for, and channel conditions such as excessive cable length and return loss, crosstalk, echo, and noise. Broadcom’s cable analyzer software can be used with the device to provide remote management of the cable and a first level of diagnostics and fault isolation. The BCM5482 also has ESD tolerance that is well above typical industry standards. This prevents ESD damage not only during manufacturing, but also during CESD events in the field. The CESD is an ESD event that occurs when an electrically charged network cable is plugged into a network port. This is an issue becoming more prevalent with contemporary cable installations. The BCM5482 can tolerate over 3 kV of CESD. TXD[3:0]{2:1} TX_EN{2:1} GTXCLK{2:1} RX_DV{2:1} RXD[3:0]{2:1} RXC{2:1} SGIN(1){2:1} SCLK(1){2:1} SGOUT(1){2:1} MDC{2:1} MDIO{2:1} MODES LED[2:1]{2:1} SYMBOL ENCODER SERIAL/SGMII LED DRIVERS MII REGISTERS VOLTAGE REGULATOR BIAS GENERATOR AUTO- NEGOTIATION TX DAC ECHO CANCELLER FFE ADC PGA TRD[3:0]{2:1} XTAL1 XTAL0 RDAC REGSUP[2:1] REGCNTL[2:1] REGSEN[2:1] + + + BASELINE WANDER CORRECTION CLOCK GENERATOR TIMING AND PHASE RECOVERY XTALK CANCELLER DFE AND TRELLIS DECODER MII MGMT CONTROL SYMBOL DECODER/ ALIGNER + |
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