AD7788/AD7789

Rev. B | Page 12 of 20

Table 8. Register Selection

RS1

RS0

Register

Register Size

0

0

Communications register during a write operation

8-bit

0

0

Status register during a read operation

8-bit

0

1

Mode register

8-bit

1

0

Reserved

8-bit

1

1

Data register

16-bit (AD7788)

24-bit (AD7789)

Table 9. Channel Selection

CH1

CH0

Channel

0

0

AIN(+) − AIN(−)

0

1

Reserved

1

0

AIN(−) − AIN(−)

1

1

STATUS REGISTER

(RS1, RS0 = 0, 0; Power-On/Reset = 0x88 for AD7788 and 0x8C for AD7789)

The status register is an 8-bit, read only register. To access the ADC status register, the user must write to the communications register,

select the next operation to be a read, and load Bit RS1 and Bit RS0 with 0. Table 10 outlines the bit designations for the status register.

SR0 through SR7 indicate the bit locations, SR denoting the bits are in the status register. SR7 denotes the first bit of the data stream. The

number(s) in brackets indicates the power-on/reset default status of that bit.

MSB

LSB

SR7

SR6

SR5

SR4

SR3

SR2

SR1

SR0

RDY[1]

ERR[0]

0[0]

0[0]

1[1]

WL[1/0]

CH1[0]

CH0[0]

Table 10. Status Register Bit Designations

Bit Location

Bit Name

Description

SR7

RDY

Ready Bit for ADC. Cleared when data is written to the ADC data register. The RDY bit is set automatically

after the ADC data register has been read or a period of time before the data register is updated with a

new conversion result to tell the user not to read the conversion data. It is also set when the part is

placed in power-down mode. The end of a conversion is indicated by the DOUT/RDY pin. This pin can be

used as an alternative to the status register for monitoring the ADC for conversion data.

SR6

ERR

ADC Error Bit. This bit is written to at the same time as the RDY bit. Set to indicate that the result written

to the ADC data register has been clamped to all 0s or all 1s. Error sources include overrange, under-

range. Cleared by a write operation to start a conversion.

SR5

0

This bit is cleared automatically.

SR4

0

This bit is cleared automatically.

SR3

1

This bit is set automatically.

SR2

WL

AD7788/AD7789 Identifier. This bit is cleared automatically if the device is an AD7788 and it is set

automatically if the device is an AD7789. This bit is used to distinguish between the AD7788 and

AD7789.

SR1 to SR0

CH1 to CH0

These bits indicate which channel is being converted by the ADC.