AD7788ARMZ datasheet(18/20 Pages) AD

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AD7788/AD7789

Rev. B | Page 18 of 20

Reference voltage sources like those recommended in the pre-

vious section (for example, ADR391) typically have low output

impedances and are, therefore, tolerant to having decoupling

capacitors on REFIN(+) without introducing gain errors in the

system. Deriving the reference input voltage across an external

resistor means that the reference input sees a significant exter-

nal source impedance. External decoupling on the REFIN pins

is not recommended in this type of circuit configuration.

VDD MONITOR

Along with converting external voltages, the analog input

channel can be used to monitor the voltage on the VDD pin.

When Bit CH1 and Bit CH0 in the communications register are

set to 1, the voltage on the VDD pin is internally attenuated by 5

and the resultant voltage is applied to the Σ-Δ modulator using

an internal 1.17 V reference for analog-to-digital conversion.

This is useful because variations in the power supply voltage

can be monitored.

GROUNDING AND LAYOUT

Because the analog inputs and reference inputs of the ADC are

differential, most of the voltages in the analog modulator are

common-mode voltages. The excellent common-mode

rejection of the part removes common-mode noise on these

inputs. The digital filter provides rejection of broadband noise

on the power supply, except at integer multiples of the

modulator sampling frequency. The digital filter also removes

noise from the analog and reference inputs, provided that these

noise sources do not saturate the analog modulator. As a result,

the AD7788/AD7789 are more immune to noise interference

than conventional high resolution converters. However, because

the resolution of the AD7788/AD7789 is so high, and the noise

levels from the AD7788/AD7789 are so low, care must be taken

with regard to grounding and layout.

The printed circuit board that houses the AD7788/AD7789

should be designed such that the analog and digital sections

are separated and confined to certain areas of the board. A

minimum etch technique is generally best for ground planes

because it gives the best shielding.

It is recommended that the AD7788/AD7789 GND pins be tied

to the AGND plane of the system. In any layout, it is important

that the user consider the flow of currents in the system,

ensuring that the return paths for all currents are as close as

possible to the paths the currents took to reach their

destinations. Avoid forcing digital currents to flow through the

AGND sections of the layout.

The AD7788/AD7789 ground plane should be allowed to run

under the devices to prevent noise coupling. The power supply

lines to the AD7788/AD7789 should use as wide a trace as

possible to provide low impedance paths and reduce the effects

of glitches on the power supply line. Fast switching signals, such

as clocks, should be shielded with digital ground to avoid

radiating noise to other sections of the board, and clock signals

should never be run near the analog inputs. Avoid crossover of

digital and analog signals. Traces on opposite sides of the board

should run at right angles to each other. This reduces the effects

of feedthrough through the board. A microstrip technique is by

far the best, but it is not always possible with a double-sided

board. In this technique, the component side of the board is

dedicated to ground planes, with signals placed on the solder

side.

Good decoupling is important when using high resolution

ADCs. VDD should be decoupled with a 10 μF tantalum in

parallel with 0.1 μF capacitors to GND. To achieve the best

from these decoupling components, they should be placed as

close as possible to the device, ideally right up against the

device. All logic chips should be decoupled with 0.1 μF

ceramic capacitors to DGND.

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