L6598

Block diagram description

Doc ID 6554 Rev 7

15/24

5.5

Comparators

Two CMOS comparators are available to perform protection schemes.

has a threshold of 0.6 V (typical value) forces the device in a latched shut down state (e.g.

LVG low, HVG low, oscillator stopped), as in the under voltage conditions. Normal operating

conditions are resumed after a power-off power-on sequence. The EN2 input (active high),

with a threshold of 1.2 V (typical value) restarts a Soft Start sequence (see timing

diagrams). In addition the EN2 comparator, when activated, removes a latched shutdown

caused by EN1.

Figure 14.

Switching time waveform definitions

Figure 15.

Dead time and duty cycle waveform definition