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MIC4604 Datasheet(PDF) 12 Page - Micrel Semiconductor |
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MIC4604 Datasheet(HTML) 12 Page - Micrel Semiconductor |
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12 / 18 page ![]() Micrel, Inc. MIC4604 June 25, 2013 12 Revision 1.0 The die temperature can be calculated after the total power dissipation is known. JA total A J Pdiss T T θ × + = Eq. 11 Where: TA = maximum ambient temperature TJ = junction temperature (°C) Pdisstotal = power dissipation of the MIC4604 θ JA = thermal resistance from junction to ambient air Propagation Delay and Other Timing Considerations Propagation delay and signal timing are important considerations. Many power supply topologies use two switching MOSFETs operating 180° out of phase from each other. These MOSFETs must not be on at the same time or a short circuit will occur, causing high peak currents and higher power dissipation in the MOSFETs. The MIC4604 output gate drivers are not designed with anti-shoot-through protection circuitry. The output drive signals simply follow the inputs. The power supply design must include timing delays (dead-time) between the input signals to prevent shoot-through. Make sure the input signal pulse width is greater than the minimum specified pulse width. An input signal that is less than the minimum pulse width may result in no output pulse or an output pulse whose width is significantly less than the input. The maximum duty cycle (ratio of high side on-time to switching period) is controlled by the minimum pulse width of the low side and by the time required for the CB capacitor to charge during the off-time. Adequate time must be allowed for the CB capacitor to charge up before the high-side driver is turned on. Decoupling and Bootstrap Capacitor Selection Decoupling capacitors are required for both the low side (VDD) and high side (HB) supply pins. These capacitors supply the charge necessary to drive the external MOSFETs and also minimize the voltage ripple on these pins. The capacitor from HB to HS has two functions: it provides decoupling for the high-side circuitry and also provides current to the high-side circuit while the high-side external MOSFET is on. Ceramic capacitors are recommended because of their low impedance and small size. Z5U type ceramic capacitor dielectrics are not recommended because of the large change in capacitance over temperature and voltage. A minimum value of 0.1µF is required for each of the capacitors, regardless of the MOSFETs being driven. Larger MOSFETs may require larger capacitance values for proper operation. The voltage rating of the capacitors depends on the supply voltage, ambient temperature and the voltage derating used for reliability. 25V rated X5R or X7R ceramic capacitors are recommended for most applications. The minimum capacitance value should be increased if low voltage capacitors are used because even good quality dielectric capacitors, such as X5R, will lose 40% to 70% of their capacitance value at the rated voltage. Placement of the decoupling capacitors is critical. The bypass capacitor for VDD should be placed as close as possible between the VDD and VSS pins. The bypass capacitor (CB) for the HB supply pin must be located as close as possible between the HB and HS pins. The etch connections must be short, wide, and direct. The use of a ground plane to minimize connection impedance is recommended. Refer to the section on Grounding, Component Placement and Circuit Layout for more information. The voltage on the bootstrap capacitor drops each time it delivers charge to turn on the MOSFET. The voltage drop depends on the gate charge required by the MOSFET. Most MOSFET specifications specify gate charge versus Vgs voltage. Based on this information and a recommended ΔV HB of less than 0.1V, the minimum value of bootstrap capacitance is calculated as: HB gate B V Q C ∆ ≥ Eq. 12 Where: Qgate = total gate charge at VHB ∆V HB = voltage drop at the HB pin The decoupling capacitor for the VDD input may be calculated in with the same formula; however, the two capacitors are usually equal in value. Grounding, Component Placement and Circuit Layout Nanosecond switching speeds and ampere peak currents in and around the MIC4604 drivers require proper placement and trace routing of all components. Improper placement may cause degraded noise immunity, false switching, excessive ringing, or circuit latch-up. Figure 8 shows the critical current paths when the driver outputs go high and turn on the external MOSFETs. It also helps demonstrate the need for a low impedance ground plane. Charge needed to turn-on the MOSFET gates comes from the decoupling capacitors CVDD and CB. Current in the low-side gate driver flows from CVDD through the internal driver, into the MOSFET gate, and out the source. The return connection back to the decoupling capacitor is made through the ground plane. Any inductance or resistance in the ground return path causes a voltage spike or ringing to appear on the source of the MOSFET. This voltage works against the gate drive voltage and can either slow down or turn off the MOSFET during the period when it should be turned on. |
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