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CPC9909 Datasheet(PDF) 6 Page - IXYS Corporation |
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CPC9909 Datasheet(HTML) 6 Page - IXYS Corporation |
6 / 12 page ![]() INTEGRATED CIRCUITS DIVISION CPC9909 6 www.ixysic.com R03 2. Functional Description Figure 1 Typical Application Circuit 2.1 Overview The CPC9909 drives the LEDs via a minimum off-time, peak-current-limited, pulse-frequency modulation scheme. This control scheme is inherently stable, and the driver can be operated above a 50% duty cycle without any open-loop instability or sub-harmonic oscillations. Since the switching frequency depends on the LED load current, it results in a high efficiency operation. 2.2 LED Driver Theory of Operation The typical application circuit is as shown in Figure 1 When PWMD is high, the control circuit is enabled and the gate driver turns on the external power MOSFET (Q1), causing the inductor (L1) current to ramp up until the voltage across the current sense resistor (RSENSE) exceeds VCS(high). When the voltage at the CS pin exceeds this threshold, the gate driver turns Q1 off. Q1 remains off for the duration of the fixed minimum off-time. While the switch is off, the inductor continues to deliver the current to the load though the diode (D1). When the off-time expires, Q1 turns on again until the peak current limit is reached, and the process repeats. The peak current limit threshold is set by the external sense resistor, RSENSE, and the internal voltage threshold, VCS(high). This internal voltage threshold can also be set externally via the LD pin. The lower of these two thresholds and RSENSE set the peak current in the inductor. A soft start function can be implemented by ramping up the DC voltage at the LD pin from 0V to VCS(high) at the desired rate. To utilize the soft start function, connect a resistor divider from VDD to ground and a capacitor from the LD pin to ground, as shown in Figure 2 Soft-Start Circuit CPC9909 Voltage Regulator Voltage Reference Q TRIG Minimum Off-Time One Shot S R Q - + - + V DD V IN LD PWMD GND CS GATE 8 - 550V V DD RT R T R T R SENSE Q1 D1 L1 Buck Configuration C VDD CPC9909 V IN CS GND GATE R T LD V DD PWMD 51k Ω 2.2k Ω 0.1 μF |
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