ADM232LAN datasheet(12/20 Pages) AD

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ADM231L–ADM234L/ADM236L–ADM241L

Rev. C | Page 12 of 20

GENERAL INFORMATION

The ADM231L–ADM234L/ADM236L–ADM241L family of

RS-232 drivers/receivers is designed to solve interface problems

by meeting the EIA-232-E specifications while using a single

digital 5 V supply. The EIA-232-E standard requires that trans-

mitters deliver ±5 V minimum on the transmission channel

and that receivers can accept signal levels down to ±3 V. The

ADM231L–ADM234L/ADM236L–ADM241L meet these

requirements by integrating step-up voltage converters and

level-shifting transmitters and receivers onto the same chip.

CMOS technology is used to keep the power dissipation to

an absolute minimum. A comprehensive range of transmitter/

receiver combinations is available for most communications needs.

The ADM236L and ADM241L are particularly useful in

battery-powered systems because they feature a low power

shutdown mode that reduces power dissipation to less than 5 µW.

The ADM233L is designed for applications in which space

saving is important because the charge pump capacitors are

molded into the package. The ADM231L and ADM239L

include only a negative charge pump converter and are intended

for applications in which +12 V is available.

To facilitate sharing a common line or for connection to a

microprocessor data bus, the ADM236L, ADM239L, and

ADM241L feature an enable (EN, EN) function. When the

receivers are disabled, their outputs are placed in a high

impedance state.

CH1

CH3

5.00V

5.00V BW

CH2 5.00V M50.0

µs CH1

3.1V

V+, V– EXITING SD

V+

V–

Figure 26. Charge Pump V+ and V− Exiting Shutdown

CH1

5.00V

CH2 5.00V M1.00

µs CH1

800mV

Tx OUTPUT

Tx INPUT

Figure 27. Transmitter Output Loaded Slew Rate

CH1

5.00V

CH2 5.00V M1.00

µs CH1

800mV

Tx OUTPUT

Tx INPUT

Figure 28. Transmitter Output Unloaded Slew Rate

CIRCUIT DESCRIPTION

The internal circuitry in the ADM236L to ADM241L consists of

three main sections: a charge pump voltage converter, RS-232-to-

TTL/CMOS receivers, and TTL/CMOS-to-RS-232 transmitters.

Charge Pump DC-to-DC Voltage Converter

The charge pump voltage converter consists of an oscillator and

a switching matrix. The converter generates a 10 V supply from

the 5 V input. This is done in two stages using a switched

capacitor technique, as illustrated in Figure 29 and Figure 30.

First, the 5 V input supply is doubled to 10 V, using capacitor

C1 as the charge storage element. The 10 V level is then

inverted to generate –10 V, using C2 as the storage element.

V+ = 2VCC

INTERNAL

OSCILLATOR

VCC

GND

VCC

Figure 29. Charge Pump Voltage Doubler

INTERNAL

OSCILLATOR

V+

GND

V– = –(V+)

GND

FROM

VOLTAGE

DOUBLER

Figure 30. Charge Pump Voltage Inverter

Capacitors C3 and C4 are used to reduce the output ripple.

Their values are not critical and can be reduced if higher levels

of ripple are acceptable. The charge pump capacitors, C1 and C2,

can be reduced at the expense of higher output impedance on the

V+ and V– supplies, and the V+ and V– supplies can be used to

power external circuitry if the current requirements are small.

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