LTC1865LCMS datasheet(15/24 Pages) LINER

15 / 24 page

LTC1864/LTC1865

18645fb

APPLICATIONS INFORMATION

GENERAL ANALOG CONSIDERATIONS

Grounding

The LTC1864/LTC1865 should be used with an analog

ground plane and single point grounding techniques. Do not

use wire wrapping techniques to breadboard and evaluate

the device. To achieve the optimum performance, use a

printed circuit board. The ground pins (AGND and DGND

for the LTC1865 MSOP package and GND for the LTC1864

and LTC1865 SO-8 package) should be tied directly to the

analog ground plane with minimum lead length.

Bypassing

For good performance, the VCC and VREF pins must be free

of noise and ripple. Any changes in the VCC/VREF voltage

with respect to ground during the conversion cycle can

induce errors or noise in the output code. Bypass the VCC

and VREF pins directly to the analog ground plane with

a minimum of 1μF tantalum. Keep the bypass capacitor

leads as short as possible.

Analog Inputs

Because of the capacitive redistribution A/D conversion

techniques used, the analog inputs of the LTC1864/LTC1865

have capacitive switching input current spikes. These cur-

rent spikes settle quickly and do not cause a problem if

source resistances are less than 200Ω or high speed op

amps are used (e.g., the LT®1211, LT1469, LT1807, LT1810,

LT1630, LT1226 or LT1215). But if large source resistances

are used, or if slow settling op amps drive the inputs, take

care to ensure the transients caused by the current spikes

settle completely before the conversion begins.

Figure 5. LTC1865 Transfer Curve

VIN*

*VIN = (SELECTED “+” CHANNEL) –

(SELECTED “–” CHANNEL)

REFER TO TABLE 1

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0

•

18645 F05

LTC1865LCMS Datasheet(PDF) 15 Page - Linear Technology

LTC1865LCMS Datasheet(HTML) 15 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL